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Logo: Institute of Microelectronic Systems
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Logo: Institute of Microelectronic Systems
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Processor Architectures

Multi-Energy Harvesting (MEH) - A Flexible Platform for Energy Harvesting in Home Automation

Bild zum Projekt Multi-Energy Harvesting (MEH) - Flexible Plattform für Energiesammelsysteme für die Gebäudeautomation

Supervisor:

Prof. Dr.-Ing. H. Blume, Prof. Dr.-Ing. B. Wicht, Jun.-Prof. Dr.-Ing. G. Payá Vayá

Researcher:

M.Sc. Moritz Weißbrich, M.Sc. Lars-Christian Kähler

Duration:

October 2018 - March 2021

Funded by:

BMBF

Brief description:

In this project, a platform concept for intelligent home automation components is developed, which can serve as a basis for next-generation sensors and actors. The main characteristic of this platform concept is ultra-low power consumption and ultra-low voltage operation. In combination with harvested energy from multiple sources (multi-energy harvesting), an extended lifetime and reduced battery cell requirements become possible compared to current systems.

 

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Smart Hearing Aid Processor (Smart HeaP)

Bild zum Projekt Smart Hearing Aid Processor (Smart HeaP)

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. Guillermo Payá Vayá

Researcher:

Dipl.-Ing. L. Gerlach, M.Sc. J. Karrenbauer

Duration:

April 2018 - April 2021

Funded by:

BMBF

Brief description:

In the Smart Hearing Aid Processor (Smart HeaP) project, a novel hearing aid processor is designed, developed and built which, despite its simple programmability and wireless Bluetooth interface, is characterized by low power consumption and high computing power.

 

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CHORUS

Bild zum Projekt CHORUS

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Duration:

01.11.2018 - 31.03.2021

Funded by:

BMWi

Brief description:

A highly optimized hardware/software module library for intelligent sensor systems in highly automated driver assistance applications based on the reconfigurable Dream Chip Technologies DCT10A SoM platform

 

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TETRACOM

Bild zum Projekt TETRACOM

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach

Duration:

January 2016 - July 2016

Brief description:

Nowadays, continuous development of digital signal processing applications, e.g., video-based advanced driver assistance systems, are pushing the limits of existing embedded systems and are forcing system developers to spend more time on code optimization. These applications often involve complex mathematical functions like trigonometric, logarithmic, exponential, or square root operations. In particular, these functions can only efficiently be computed on standard general purpose embedded processors, using highly optimized, processor specific arithmetic evaluation software libraries. Another alternative is to extend the embedded processor architectures with a specific hardware accelerator.

 

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Design of a Configurable, Massive-Parallel Vector Processor Architecture for Computer Vision and a Framework for the Implementation of Object Recognition Applications for Embedded Systems

Bild zum Projekt Entwurf einer konfigurierbaren, massiv parallelen Computer-Vision Vektorprozessorarchitektur und einer Abbildungsmethodik für Anwendungen zur Objekterkennung auf eingebetteten Systemen

Supervisor:

Jun.-Prof. Dr.-Ing. Guillermo Payá Vayá

Researcher:

Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach

Duration:

Mai 2016 - Oktober 2017

Brief description:

The increasing complexity of current computer vision algorithms for autonomous driving, such as object detection and classification using neural networks, represents a challenge for automotive system designers. Providing a real-time processing system under hard real-time constraints and a low energy (budget a few watts) is difficult to achieve even with current technical platforms. The goal of this project is to design a new approach of application-specific vector processor for FPGA implementation. The well-known overhead of other platforms (e.g. GPUs) shall be avoided by using several strategies: Novel functional mechanisms, a modular and customizable architecture and a suitable development framework, which is especially designed for the implementation of automotive applications.). An FPGA-based prototype will demonstrate the performance of the vector processor concept for a selected application at the end of the project.

 

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Hearing4All

Bild zum Projekt Hearing4All

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

M.Sc. C. Seifert, Dipl.-Ing. L. Gerlach

Duration:

November 2012 - December 2018

Brief description:

The joint venture "Hearing4all" that the IMS-AS participates in with multiple sub-projects, has been chosen as one of the federal cluster of excellence projects Friday June 15th 2012. In the scope of this project the IMS-AS aims to develop high-performance and low-power processor architectures for digital hearing systems, such as cochlear implants or hearing aids.

 

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Stochastic Processor

Bild zum Projekt Stochastic Processor

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá, Prof. Dr.-Ing. Holger Blume

Researcher:

M.Sc. Moritz Weißbrich

Duration:

February 2016 - January 2019

Funded by:

Deutsche Forschungsgemeinschaft (DFG)

Brief description:

Stochastic computing has recently emerged as a promising approach for designing energy-efficient embedded hardware systems, taking into account the ability of many applications (e.g., computer vision) to tolerate the loss of precision in the computed results. Rather than designing the hardware for worst case scenarios featuring expensive guard-bands, designers can relax the implementation constraints and deliberately expose hardware variability, obtaining significant processing performance improvements and energy benefits.

 

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OPARO

Bild zum Projekt OPARO

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Wirtsch.-Ing. Sebastian Hesselbarth

Brief description:

In the development of integrated, programmable circuits, the optimization of power dissipation and temperature distribution is becoming increasingly important. So far, however, these can only be determined by very time-consuming simulations. Therefore, precise models for the determination of power dissipation shall be developed and mapped together with the functional emulation on FPGAs. By accelerating the determination of power dissipation and temperature distribution, specific optimizations of the architecture and the application code can then be made taking real input data into account.

 

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RAPANUI - Rapid-Prototyping for Media Processor Architecture Exploration

 

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

M. Sc. Florian Giesemann

Brief description:

Design, implementation, and evaluation of a prototyping-based Designmethodology for processor architectures for digital signal processing.

 

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GEBO - High Temperature Electronic

Bild zum Projekt GEBO - Hochtemperaturelektronik

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Ing. Rochus Nowosielski

Duration:

2009-20111

Brief description:

In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.

 

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High Temperature Measurement While Drilling

Bild zum Projekt High Temperature Measurement While Drilling

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Ing. Rochus Nowosielski

Duration:

2012-2014

Brief description:

The goal of the research is an MWD processor system for drilling tools used for geothermal drilling in ambient temperatures up to 300 °C. The processing of the project includes research aspects in the fields of hardware design, fault tolerance of digital systems and ASIC design.

 

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Biomedical Engineering

Smart Hearing Aid Processor (Smart HeaP)

Bild zum Projekt Smart Hearing Aid Processor (Smart HeaP)

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. Guillermo Payá Vayá

Researcher:

Dipl.-Ing. L. Gerlach, M.Sc. J. Karrenbauer

Duration:

April 2018 - April 2021

Funded by:

BMBF

Brief description:

In the Smart Hearing Aid Processor (Smart HeaP) project, a novel hearing aid processor is designed, developed and built which, despite its simple programmability and wireless Bluetooth interface, is characterized by low power consumption and high computing power.

 

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ZIM D-Sense - Development of a Testing System for the Diagnosis of Sensorimotor Regulation Abilities in Athletes

Bild zum Projekt ZIM D-Sense - Entwicklung eines Testsystems zur Diagnostik sensomotorischer Regulationsfähigkeit für Sportler

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

M.Sc. Fritz Webering, M. Sc. Niklas Rother

Duration:

2017-2019

Funded by:

„Zentrales Innovationsprogramm Mittelstand“ of the BMWi - Federal Ministry for Economic Affairs and Energy

Brief description:

The aim of the project is to develop a mobile diagnostics system which can be used to to assess the sensorimotor regulation abilities in athletes. The system should consist of multiple sensor units and allow the athlete or coach to quickly and precisely perform different functional sensorimotor tests. The sensor units can be placed at different points on or next to the subject's body, depending on the concrete test being performed. Also depending on the test, different algorithms are to be used for classifying and evaluating the measurements from the sensor units. A database helps the user to interpret the test results and provides reference values for risk assessments regarding injuries.

 

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Efficient Real-time Processing of EEG-Signals

Bild zum Projekt Efficient Real-time Processing of EEG-Signals

Supervisor:

Prof. Dr.-Ing. Holger Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

Marc-Nils Wahalla, Dipl.-Ing.

Brief description:

A brain-computer interface (BCI) is a system that generates signals to control an artificial system based on measurements of the activity of the central nervous system, for example, to replace, enhance or supplement certain tasks of human action. Modern BCIs are often based on the decoding or interpretation of EEG signals, as such systems are both non-invasive and cost-effectively available. These sensors detect a variety of independent, superimposed signals that make their immediate use for controlling a digital system difficult. Therefore, each application and corresponding application environment requires specifically designed and customized algorithms. This project therefore investigates methods for the efficient real-time processing of EEG signals. For this purpose, the Institute of Microelectronic Systems is developing a complete system of dedicated, configurable hardware in combination with a signal-processing framework specially adapted for the processing of EEG signals.

 

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TETRACOM - Mobile platform for real-time sonification of movements for medical rehabilitation

Bild zum Projekt TETRACOM - Mobile platform for real-time sonification of movements for medical rehabilitation

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

M.Sc. Daniel Pfefferkorn

Duration:

September 2013 - August 2016

Funded by:

FP7 ‐ ICT ‐ 2013 ‐ 10

Brief description:

The rehabilitation of stroke patients is an intense and lengthy process. The common therapy approach is based on movement training in presence of a therapist. Through many repetitions a remobilization of the patient is achieved. Due to this highly time‐consuming treatment, the costs of for the therapy are very high. Therefore, in this research project, we are focusing on the design of a mobile system, which will provide a motion feedback by means of sonification. It will enable therapist‐independent training and as a result lessen the strain on patient and healthcare system.

 

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Optogenetic

Bild zum Projekt Optogenetik

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Marc-Nils Wahalla, Dipl.-Ing.

Brief description:

Within this cooperation with the Institute of Technical Chemistry and the Institute of Quantum Optics of the Leibniz Universität Hannover, methods are being studied to control the behavior of intracellular processes from the outside with light. Optogenetics can be used to specifically modify light-insensitive cells in order to respond to the influence of light. Due to the common previous experience between the project partners, especially optogenetic questions in the context of tissue engineering are focussed.

 

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Hearing4All

Bild zum Projekt Hearing4All

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

M.Sc. C. Seifert, Dipl.-Ing. L. Gerlach

Duration:

November 2012 - December 2018

Brief description:

The joint venture "Hearing4all" that the IMS-AS participates in with multiple sub-projects, has been chosen as one of the federal cluster of excellence projects Friday June 15th 2012. In the scope of this project the IMS-AS aims to develop high-performance and low-power processor architectures for digital hearing systems, such as cochlear implants or hearing aids.

 

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BIOFABRICATION for NIFE

Bild zum Projekt BIOFABRICATION for NIFE

Supervisor:

Prof. Dr.-Ing. Blume

Researcher:

Dipl.-Ing. Christian Leibold

Duration:

May 2013 - June 2018

Funded by:

VolkswagenStiftung and County Lower Saxony

Brief description:

BIOFABRICATION for NIFE ist ein interdisciplinary research network between the Hanover Medical School, the Leibniz University of Hanover and the Hanover University of Music, Drama and Media. The goal of this research network is to achieve methods for growing biocompatible organic implants with heavily reduced rejection reactions.

 

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Real-time, low-latency sonification of complex movements

Bild zum Projekt Echtzeitfähige Sonifikation komplexer Bewegungen

Supervisor:

Prof. Dr.-Ing. Blume

Researcher:

Dipl.-Ing. (FH) H.-P. Brückner

Duration:

February 2011 - June 2013

Funded by:

Europäischer Fonds für regionale Entwicklung (EFRE)

Brief description:

The goal of this research project in the field of biomedical engineering is to generate an auditory feedback (sonification) of human movements. The IMS focuses on examing the performance of different hardware platforms for this application. Relevant performance parameters are the platforms power dissipation and the overall latency. Finally, the project goal is to enhance stroke rehabilitation by additionally providing auditory arm movement feedback. This could lead to shortened rehabilitation periods. Furthermore, the mobile hardware platform developed at the IMS allows home based rehabilitation.

 

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Analog/Mixed-Signal-Design

Multi-Energy Harvesting (MEH) - A Flexible Platform for Energy Harvesting in Home Automation

Bild zum Projekt Multi-Energy Harvesting (MEH) - Flexible Plattform für Energiesammelsysteme für die Gebäudeautomation

Supervisor:

Prof. Dr.-Ing. H. Blume, Prof. Dr.-Ing. B. Wicht, Jun.-Prof. Dr.-Ing. G. Payá Vayá

Researcher:

M.Sc. Moritz Weißbrich, M.Sc. Lars-Christian Kähler

Duration:

October 2018 - March 2021

Funded by:

BMBF

Brief description:

In this project, a platform concept for intelligent home automation components is developed, which can serve as a basis for next-generation sensors and actors. The main characteristic of this platform concept is ultra-low power consumption and ultra-low voltage operation. In combination with harvested energy from multiple sources (multi-energy harvesting), an extended lifetime and reduced battery cell requirements become possible compared to current systems.

 

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New Simulation Methods for Accelerated Mixed-Signal Simulation

Bild zum Projekt Neue Simulationsmethoden zur beschleunigten Mixed-Signal-Simulation

Supervisor:

Prof. Dr.-Ing. Erich Barke

Researcher:

Dipl.-Ing. Sara Divanbeigi

Duration:

March 2014 - February 2017

Funded by:

Deutsche Forschungsgemeinschaft (DFG): BA 812/24-1

Brief description:

This research project is based on an approach for the automated model generation for accelerated mixed-signal simulation of analog circuit models and the associated simulation methodology for a transient analysis. Studies have shown good results, which make a significant acceleration in the simulation of mixed analog/digital-systems.Up to now, the current approach is limited to piecewise-constant input stimuli. One of the fundamental goals of this project is an extension of the novel simulation methodology that enables additional input signal types.

 

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Solving methods for semi-symbolic analog simulation

Bild zum Projekt Lösungsverfahren für semi-symbolische Analog-Simulationen

Supervisor:

Prof. Dr.-Ing. Erich Barke

Researcher:

Dipl.-Ing. Oliver Scharf

Duration:

January 2012 - May 2015

Brief description:

Parameters of analog circuits are not exactly known as they are influenced by fabrication, aging or environment temperature. At the Institute of Microelectronic Systems an analog circuit simulator was developed which use affine arithmetic to simulate these parameter deviations. This project aims at increasing the convergence area by using parameter splitting.

 

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ROBUST

Bild zum Projekt ROBUST

Supervisor:

Prof. Dr.-Ing. Erich Barke

Researcher:

Dipl.-Ing. Michael Kaergel

Duration:

Mai 2009 - April 2012

Funded by:

BMBF

Brief description:

ROBUST researches new methods and procedures for designing robust nanoelectronic systems. The project defines quantitative measures of robustness. These metrics are determined by abstracting models of robustness and by applying new analysis methods suitable for the system level.

 

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Reliable Behavioural Modelling

Bild zum Projekt Verlässliche Modellierung

Supervisor:

Prof. Dr.-Ing. Erich Barke

Researcher:

Dipl.-Ing. Anna Krause

Brief description:

This project aims at generating behavioural models which include parameter variations of the original circuit. Parameter variations are represented by affine arithmetic.

 

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GEBO - High Temperature Electronic

Bild zum Projekt GEBO - Hochtemperaturelektronik

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Ing. Rochus Nowosielski

Duration:

2009-20111

Brief description:

In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.

 

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ANCONA: Analog Mixed-Level Modeling with Accelerated Mixed-Signal Simulation to Increase Analog Coverage

Bild zum Projekt ANCONA: Analoge Mixed-Level-Modellierung mit beschleunigter Mixed-Signal-Simulation zur Erhöhung der Analog-Coverage

Supervisor:

Dr.-Ing. Markus Olbrich

Researcher:

Dipl.-Ing. Lukas Lee

Duration:

Juli 2014 - Juni 2017

Funded by:

BMBF

Brief description:

The IMS develops method and measures for the analysis of analog verification coverage. The goal is to evaluate and to increase the verification coverage of analog and mixed-signal circuits.

 

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Design Space Exploration

OPARO

Bild zum Projekt OPARO

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Wirtsch.-Ing. Sebastian Hesselbarth

Brief description:

In the development of integrated, programmable circuits, the optimization of power dissipation and temperature distribution is becoming increasingly important. So far, however, these can only be determined by very time-consuming simulations. Therefore, precise models for the determination of power dissipation shall be developed and mapped together with the functional emulation on FPGAs. By accelerating the determination of power dissipation and temperature distribution, specific optimizations of the architecture and the application code can then be made taking real input data into account.

 

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EFdiS – Use of airborne SAR with digital interface

Bild zum Projekt EFdiS – Einsatz von Flug-SAR mit digitaler Schnittstelle

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Ing. M. Wielage

Duration:

October 2012 - December 2014

Brief description:

The goal of this research project is the processing of FMCW sensor signals. The first step is intended to digitize the analog data on board through a suitable expansion card. In the second step, the digitized data is to be processed on board, and thus converted to an aerial image.

 

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Digital Video-processing for automation in agriculture

Bild zum Projekt Digitale Videosignalverarbeitung für die Automatisierungstechnik in der Landwirtschaft

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

J. Hartig, S. Gesper

Duration:

a 2017-2019

Brief description:

Within this project, algorithms are developed, architectures explored and a final hardware-platform designed and evaluated. The overall system will be tested in a field test.

 

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Compact Realtime SAR-Image processor

Bild zum Projekt Miniaturisierter Echtzeit SAR Prozessor

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

F. Cholewa, C. Fahnemann

Duration:

2008-2020

Brief description:

The goals of this project are the generation and compression of high resolution Synthetic Aperture Radar (SAR) images under real time conditions. Compared to camera based electro-optical sensors, a SAR system operates almost independent from daylight and weather conditions. State-of-the-art SAR sensor systems achieve spatial resolutions up to 10 cm at 10 km altitude. By using FPGAs for high performance digital signal processing tasks, aerial images can be generated in real time even in case of very large image dimensions.

 

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Physical Design

Untersuchung zur Simulation von Bauelementen und Komponenten für die Entwicklung strahlenrobuster autonomer Systeme

 

Supervisor:

PD Dr.-Ing. Dipl.-Phys. Kirsten Weide-Zaage

Duration:

01.02.2015-31.12.2017

Brief description:

Im Zuge der Miniaturisierung moderner integrierter Schaltungen verändert sich die Strahlenhärte der Systeme und Komponenten. Daraus resultierend ist es notwendig, die die Strahlenhärte beeinflussenden Mechanismen im Halbleiter zu bestimmen.

 

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NEEDS

Bild zum Projekt NEEDS

Supervisor:

Dr.-Ing. Markus Olbrich

Researcher:

M. Sc. Artur Quiring

Duration:

2010 - 2013

Funded by:

The project NEEDS is funded by the Bundesministerium für Bildung und Forschung (BMBF).

Brief description:

Highly integrated electronic systems with heterogeneous components enable reduction of resources and cost. To further benefit from the potential of electronic systems, NEEDS has the goal to advance the research in designing a new class of electronic systems, where several dies are stacked above each other (three-dimensional integrated circuits).

 

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3D-Floorplanning

Bild zum Projekt 3D-Floorplanning

Supervisor:

Markus Olbrich

Researcher:

M. Sc. Artur Quiring

Brief description:

The main goal of this research project is to find appropriate optimization algorithms and datastructures for 3D-Floorplanning. Furthermore, new relevant optimization goals should be identified and analysed.

 

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RESCAR 2.0

Bild zum Projekt RESCAR 2.0

Supervisor:

Prof. Dr.-Ing. Erich Barke

Researcher:

M.Sc. Carolin Katzschke

Duration:

February 2011 - April 2014

Funded by:

BMBF

Brief description:

The IMS is subcontractor of the Infineon AG and will develop methods to manage domain-overlapping constraints.

 

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Parallelisierung von Routingalgorithmen

 

Supervisor:

Dr.-Ing. Markus Olbrich

Researcher:

Dipl.-Math. Björn Bredthauer

Brief description:

Werkzeuge zur Erzeugung der Verdrahtung für einen gegebenen Chip haben aufgrund der Komplexität dieses Problems sehr hohe Laufzeiten. Ziel dieses Forschungsprojektes ist die Beschleunigung dieses Vorgangs durch die Ausnutzung hochparalleler Architekturen, insbesondere Graphical Processing Units. Zu diesem Zweck sollen Algorithmen und Datenstrukturen gefunden werden, die eine effiziente Aufteilung des Problems auf eine große Anzahl an Recheneinheiten erlauben.

 

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Component reliability in high temperature automotive applications (Rely)

Bild zum Projekt Component reliability in high temperature automotive applications (Rely)

Supervisor:

PD Dr.-Ing. Dipl.-Phys. K. Weide-Zaage

Researcher:

Dipl.-Ing. Jörg Kludt

Duration:

01.05.2011-30.04.2013

Brief description:

Thermisch-elektrisch-mechanische Simulation, Degradationsmodellierung auf Device-Level

 

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Simulation of electronic devices and components through the influence of radiation

 

Supervisor:

PD Dr.-Ing. Dipl.-Phys. K. Weide-Zaage

Researcher:

PD Dr.-Ing. Dipl.-Phys. K. Weide-Zaage

Duration:

01.09.2013-31.01.2015

Brief description:

Simulation of electronic devices and components under the influence of radiation

 

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Driver Assistance Systems

PARIS - PARallele Implementierungs-Strategien für das Hochautomatisierte Fahren

Bild zum Projekt PARIS - PARallele Implementierungs-Strategien für das Hochautomatisierte Fahren

Supervisor:

Prof. Dr.-Ing. Holger Blume, Dipl.-Ing. Jakob Arndt

Researcher:

Dipl.-Ing. Jakob Arndt

Duration:

04.2017 - 03.2020

Funded by:

BMBF

Brief description:

In diesem Projekt steht das Systemdesign von Fahrerassistenzsystemen vom Szenrio bis hin zur Architektur im Fokus. Es werden sowohl neuartige selbstlernende und Sensorfusions-Algorithmen, als auch eine innovtive Prozessorarchitektur entwickelt. Darüber hinaus werden Entwicklungsschritte für eingebettete MPSoC-Applikationen, wie Architektur-Mapping und Simulationsmethoden, entwickelt.

 

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ifuse - Intelligente Fusion von Radar- und Videosensoren für anspruchsvolle, hochautomatisierte Fahrsituationen

Bild zum Projekt ifuse - Intelligente Fusion von Radar- und Videosensoren für anspruchsvolle, hochautomatisierte Fahrsituationen

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Nicolai Behmann, M.Sc.

Duration:

Mai 2017 - April 2020

Funded by:

Bundesministerium für Wirtschaft und Energie

Brief description:

Im Rahmen des BMWi-geförderten Verbundprojekts ifuse werden Algorithmen und Architekturen zur Fusion von Sensorrohdaten auf niedriger Abstraktionsebene untersucht. Gegenüber bisherigen Fusionsverfahren auf Objektlistenebene ermöglicht die Sensordatenfusion auf Rohdatenebene eine robustere Klassifikation von Objekten und Erfassung des Fahrzeugumfeldes, auch wenn einzelne Sensoren durch Umwelteinflüsse beeinträchtigt sind. Grundlage der Sensordatenfusion auf Rohdatenebene bilden Signale von aktiven und passiven Fahrzeugsensoren (beispielsweise LIDAR, RADAR, Kamera, Ultraschall), welche nach einer minimalen Vorverarbeitung auf ein gemeinsames Koordinatensystem bezogen und in einem Umweltmodell verortet werden.

 

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Verlässliche Mobilität: Mobiler Mensch im Spannungsfeld zwischen Autonomie, Vernetzung und Security

Bild zum Projekt Verlässliche Mobilität: Mobiler Mensch im Spannungsfeld zwischen Autonomie, Vernetzung und Security

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Jens Schleusner, M.Sc.

Duration:

2017-2019

Brief description:

Die Mobilität der Zukunft basiert wesentlich auf dem hochautomatisierten Fahren und damit auf verlässlichen „Advanced Driver Assistance Systems“ (ADAS). Diese Fahrerassistenzsysteme benötigen eine zuverlässige Erfassung der Umwelt durch die Sensoren der Fahrzeuge, um die erforderliche Verlässlichkeit zu erreichen. Neben Radar- und Lidar-Sensoren verfügen moderne Fahrzeuge über eine Vielzahl von Kameras, die geometrische und semantische Informationen zur Umgebung bereitstellen. Diese verschiedenen Datenströme werden im Anschluss von Datenfusionsalgorithmen auf Fahrzeuginterner Hardware weiterverarbeitet. Zur Berechnung verlässlicher Ergebnisse muss das Gesamtsystem der Signalverarbeitung aus Hardware und Software verlässlich sein. Das Fachgebiet Architekturen und Systeme des IMS wird im Rahmen des Projektes „Mobiler Mensch“ zu diesen Teilaspekten eines Systems zur verlässlichen Datenverarbeitung forschen.

 

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Adaptive blendfreie HD-Scheinwerfer

Bild zum Projekt Adaptive blendfreie HD-Scheinwerfer

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Jens Schleusner, M.Sc.

Duration:

2017-2019

Brief description:

In diesem Projekt werden Signalverarbeitungsalgorithmen für hochauflösende Scheinwerfer entworfen und echtzeitfähig auf verschiedenen Hardwareplattformen implementiert.

 

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THINGS2DO - THIN but Great Silicon 2 Design Objects

Bild zum Projekt THINGS2DO - THIN but Great Silicon 2 Design Objects

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Gregor Schewior, Nicolai Behmann

Duration:

February 2016 - March 2018

Funded by:

Europäische Union, Bundesministerium für Bildung und Forschung

Brief description:

THINGS2DO is an ENIAC project, funded by the European Union and the Federal Ministry of Education and Research. The project aims to develop the new Fully Depleted Silicon On Insulator (FD-SOI) technology and the corresponding tool environment for high efficient and highly integrated circuits. The capabilities of the technology are further demonstrated through a demonstrator in the area of Advanced Driver Assistance Systems (ADAS).

 

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ZIM Dream Chip Technologies GmbH

Bild zum Projekt ZIM Dream Chip Technologies GmbH

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Gregor Schewior, Nicolai Behmann

Duration:

September 2015 - December 2016

Funded by:

Bundesministerium für Wirtschaft und Energie

Brief description:

In cooperation with Dream Chip Technologies GmbH, Garben, Germany, the Institute of Microelectronic Systems develops with funding from the Federal Ministry of Economic Affairs and Energy a camera system with integrated algorithms for high quality real time motion estimation in the area of driver assistance systems.

 

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mDAS - Implementation of a real-time demonstrator for multicore-based driver assistance systems

Bild zum Projekt mDAS - Echtzeit-Demonstrator für multicore-basierte Fahrassistenzsysteme

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Dipl.-Ing. Jakob Arndt

Duration:

February 2014 - August 2014

Funded by:

Siemens AG

Brief description:

The goal of this Project is the conceptual design of a real-time mutlicore-based demonstrator for video-based driver assistance algorithms. Therefore, different performance metrics will be displayed in order to compare platform-specific performance characteristics.

 

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ASEV

Bild zum Projekt ASEV

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

Dipl.-Ing. Nico Mentzer

Duration:

Mai 2010 - April 2013

Funded by:

Bundesministerium für Bildung und Forschung (BMBF)

Brief description:

The goal of this sub-project of the BMBF project "Automatic Situation Interpretation for Event Triggered Video Surveillance" is to elaborate a concept for a hardware architecture that enables a SIFT (Scale Invariant Feature Transform) feature extraction under application-specific processing conditions as performance and power consumption. SIFT features offer a good basis for robust object identification and tracking for event triggered video surveillance. The field of application is thereby the airport apron, which is highly relevant to security. The concept was implemented on a FPGA-based hardware platform to build a demonstrator which was tested at the end of the project at the airport of Braunschweig.

 

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OpenFAS

Bild zum Projekt OpenFAS

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Dipl.-Ing. Christopher Bartels

Duration:

Juni 2012 - Oktober 2013

Funded by:

"Zentrales Innovationsprogramm Mittelstand" des Bundesministeriums für Wirtschaft und Technologie (BMWi)

Brief description:

In the scope of this project, a library of modules for driver assistence systems, based on a multicore processor architecture will be created. The project is in collaboration with the videantis corporation.

 

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PROPEDES - Predictive Pedestrian Protection at Night

Bild zum Projekt PROPEDES - Predictive Pedestrian Protection at Night

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Dipl.-Ing. Gregor Schewior

Duration:

August 2008 - July 2011

Funded by:

Bundesministerium für Bildung und Forschung (BMBF)

Brief description:

The objectives of the project PROPEDES is the design and demonstration of a flexible hardware archtecture based on a Very Long Instruction Word (VLIW) Softcore microprocessor for a vision-based pedestrian detection. The VLIW processor is to be supported by dedicated hardware accelerators to speed up future high-quality video-based driver assistance systems. Finally the architecture is to be implemented on a real-time FPGA-based demonstrator.

 

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DESERVE - Development Platform for Safe and Efficient Drive

Bild zum Projekt DESERVE - Development Platform for Safe and Efficient Drive

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

Florian Giesemann, Frank Meinl, Nico Mentzer

Duration:

September 2012 - August 2015

Funded by:

Europäische Union, Bundesministerium für Bildung und Forschung

Brief description:

DESERVE is a project funded by the European Union. The aim of the project is the promotion and evolution of advanced driver assistance systems (ADAS). These systems are devoted to support the driver in the safe control of the vehicle. For this purpose, the DESERVE platform is planned to be developed. This platform will be the base for future development of advanced driver assistance systems in Europe.

 

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Efficient Hardware Architectures for Fast Image Sequence Analysis

 

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Julian Hartig

Duration:

February 2014 - February 2017

Funded by:

Hans L. Merkle Stiftung

Brief description:

In practice, general reliability of modern driver assistance systems under arbitrary traffic, weather and illumination conditions often is a problem. Because more robust algorithms are computationally very intensive, this project deals with the examination of heterogenous hardware architectures and the evaluation of new mechanisms for complex applications in the field of camera-based driver assistance.

 

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Reconfigurable Architectures

Design of a Configurable, Massive-Parallel Vector Processor Architecture for Computer Vision and a Framework for the Implementation of Object Recognition Applications for Embedded Systems

Bild zum Projekt Entwurf einer konfigurierbaren, massiv parallelen Computer-Vision Vektorprozessorarchitektur und einer Abbildungsmethodik für Anwendungen zur Objekterkennung auf eingebetteten Systemen

Supervisor:

Jun.-Prof. Dr.-Ing. Guillermo Payá Vayá

Researcher:

Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach

Duration:

Mai 2016 - Oktober 2017

Brief description:

The increasing complexity of current computer vision algorithms for autonomous driving, such as object detection and classification using neural networks, represents a challenge for automotive system designers. Providing a real-time processing system under hard real-time constraints and a low energy (budget a few watts) is difficult to achieve even with current technical platforms. The goal of this project is to design a new approach of application-specific vector processor for FPGA implementation. The well-known overhead of other platforms (e.g. GPUs) shall be avoided by using several strategies: Novel functional mechanisms, a modular and customizable architecture and a suitable development framework, which is especially designed for the implementation of automotive applications.). An FPGA-based prototype will demonstrate the performance of the vector processor concept for a selected application at the end of the project.

 

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TUKUTURI

Bild zum Projekt TUKUTURI

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

M. Sc. Florian Giesemann

Funded by:

Wege in die Forschung II

Brief description:

In the TUKUTURI-project, a for ASIC-synthesis optimized VHDL-description of a soft core processor architecture will be optimized for FPGA synthesis. The suitability of special functional units for specific applications with regard to performance and area consumption will be analyzed.

 

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Circuit Design and Physical Design for a Novel FPGA Architecture

Bild zum Projekt Schaltungsentwurf und physikalisches Design für eine neuartige FPGA-Architektur

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

B. Bredthauer, C. Spindeldreier

Duration:

May 2013 - June 2014

Funded by:

Federal Ministry of Education and Reserach

Brief description:

Evaluation and analysis of the implemtability and performance of a new type of field programmable gate array (FPGA).

 

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System Design

BECCAL-I

Bild zum Projekt BECCAL-I

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Dipl.-Ing. Christian Spindeldreier

Duration:

August 2018 - Dezember 2019

Funded by:

"National Space Program" of the Federal Ministry for Economic Affairs and Energy (BMWi)

Brief description:

Scope of the bilateral BECCAL-I of DLR and NASA is the design of a platform for atom optic experiments on board of the international spece station. Within the project the Institute of Microelectronic Systems will develop and evaluate platforms and algorithms for digital signal processing in space.

 

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ZIM D-Sense - Development of a Testing System for the Diagnosis of Sensorimotor Regulation Abilities in Athletes

Bild zum Projekt ZIM D-Sense - Entwicklung eines Testsystems zur Diagnostik sensomotorischer Regulationsfähigkeit für Sportler

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

M.Sc. Fritz Webering, M. Sc. Niklas Rother

Duration:

2017-2019

Funded by:

„Zentrales Innovationsprogramm Mittelstand“ of the BMWi - Federal Ministry for Economic Affairs and Energy

Brief description:

The aim of the project is to develop a mobile diagnostics system which can be used to to assess the sensorimotor regulation abilities in athletes. The system should consist of multiple sensor units and allow the athlete or coach to quickly and precisely perform different functional sensorimotor tests. The sensor units can be placed at different points on or next to the subject's body, depending on the concrete test being performed. Also depending on the test, different algorithms are to be used for classifying and evaluating the measurements from the sensor units. A database helps the user to interpret the test results and provides reference values for risk assessments regarding injuries.

 

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Efficient Real-time Processing of EEG-Signals

Bild zum Projekt Efficient Real-time Processing of EEG-Signals

Supervisor:

Prof. Dr.-Ing. Holger Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

Marc-Nils Wahalla, Dipl.-Ing.

Brief description:

A brain-computer interface (BCI) is a system that generates signals to control an artificial system based on measurements of the activity of the central nervous system, for example, to replace, enhance or supplement certain tasks of human action. Modern BCIs are often based on the decoding or interpretation of EEG signals, as such systems are both non-invasive and cost-effectively available. These sensors detect a variety of independent, superimposed signals that make their immediate use for controlling a digital system difficult. Therefore, each application and corresponding application environment requires specifically designed and customized algorithms. This project therefore investigates methods for the efficient real-time processing of EEG signals. For this purpose, the Institute of Microelectronic Systems is developing a complete system of dedicated, configurable hardware in combination with a signal-processing framework specially adapted for the processing of EEG signals.

 

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Architekturen und Algorithmen für Hochtemperatur-Signalverarbeitung

Bild zum Projekt Architekturen und Algorithmen für Hochtemperatur-Signalverarbeitung

Supervisor:

Prof. Dr.-Ing. habil H. Blume

Researcher:

M.Sc. Tobias Volkmar

Brief description:

In dem kooperativen Industrieprojekt entstehen zusammen mit der Firma Baker Hughes Architekturen für das Einsatzgebiet der Hochtemperatur-Elektronik. Ein besonderer Schwerpunkt ist hierbei die Erforschung von Kommunikations-Algorithmen für dieses Einsatzgebiet.

 

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TETRACOM - Mobile platform for real-time sonification of movements for medical rehabilitation

Bild zum Projekt TETRACOM - Mobile platform for real-time sonification of movements for medical rehabilitation

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

M.Sc. Daniel Pfefferkorn

Duration:

September 2013 - August 2016

Funded by:

FP7 ‐ ICT ‐ 2013 ‐ 10

Brief description:

The rehabilitation of stroke patients is an intense and lengthy process. The common therapy approach is based on movement training in presence of a therapist. Through many repetitions a remobilization of the patient is achieved. Due to this highly time‐consuming treatment, the costs of for the therapy are very high. Therefore, in this research project, we are focusing on the design of a mobile system, which will provide a motion feedback by means of sonification. It will enable therapist‐independent training and as a result lessen the strain on patient and healthcare system.

 

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Site-optimized Wireless Communication Architectures

Bild zum Projekt Gebäude-optimierte Funkkommunikationsarchitekturen

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

M.Sc. Daniel Pfefferkorn

Brief description:

The communication parameters to be expected in an application scenario result from the combination of the employed standards' properties (IEEE 802.11, BLE, IEEE 802.154, ZigBee) and the specific radio wave propagation conditions of the considered building.

 

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GEBO - High Temperature Electronic

Bild zum Projekt GEBO - Hochtemperaturelektronik

Supervisor:

Prof. Dr.-Ing. H. Blume

Researcher:

Dipl.-Ing. Rochus Nowosielski

Duration:

2009-20111

Brief description:

In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.

 

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QUANTUS IV - MAIUS

Bild zum Projekt QUANTUS IV - MAIUS

Supervisor:

Prof. Dr.-Ing. Holger Blume

Researcher:

Dipl.-Ing. Christian Spindeldreier

Duration:

August 2014 - December 2021

Funded by:

"National Space Program" of the Federal Ministry for Economic Affairs and Energy (BMWi)

Brief description:

The Institute of Microelectronic Systems supports physical experiments in space in the QUANTUS IV - MAIUS Project. Within the project platforms and algorithms for digital signal processing in space will be delevoped and evaluated.

 

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