ZuSE-KI-Mobil

AI Chip Design Platform for Automotive and Industrial Applications

verfasst von

Shaown Mojumder, Simon Friedrich, Emil Matúš, Matthias Lüders, Martin Friedrich, Oliver Renke, Holger Blume, Markus Kock, Gregor Schewior, Darius Grantz, Jens Benndorf, Julian Hoefer, Patrick Schmidt, Jürgen Becker, Nael Fasfous, Pierpaolo Mori, Hans Jörg Vögel, Samira Ahmadifarsani, Leonidas Kontopoulos, Ulf Schlichtmann, Yun Jin Li, Gerhard P. Fettweis

Abstract

The ZuSE-KI-Mobil (ZuKIMo) research project presents a heterogeneous system-on-chip (SoC) designed for use in a variety of automotive and industrial edge applications. Implemented using GlobalFoundries (GF) 22-nm FD-SOI technology, the SoC features a modular architecture with a configurable, bit-serial, mixed-precision neural processing unit (NPU) core. This core can be adapted to different use cases, comes with a compact instruction set, and improves the performance of dilated convolutions. A hardware-accelerated, tunable image signal processor (ISP) hyperparameter pipeline reduces tuning time and increases detection confidence for AI tasks. The system also incorporates a selective, per-layer fault-tolerance mechanism and supports rapid prototyping via an Apache TVM-driven compiler flow and cycle-accurate simulation. The adaptable hardware generation process is designed with future chiplet-based scaling in mind, providing a flexible foundation for upcoming heterogeneous SoC designs.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Externe Organisation(en)

Technische Universität Dresden (TUD)
Dream Chip Technologies GmbH
Karlsruher Institut für Technologie (KIT)
Bayerische Motoren Werke AG
Technische Universität München (TUM)
Infineon Technologies AG

Typ

Artikel

Journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Band

33

Seiten

2961-2974

Anzahl der Seiten

14

ISSN

1063-8210

Publikationsdatum

31.10.2025

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Software, Hardware und Architektur, Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1109/TVLSI.2025.3603887 (Zugang: Geschlossen)