ForschungPublikationen
Publikationsarchiv - IMS Datenbank

Publikationen des Instituts für Mikroelektronische Systeme

Konferenzbeiträge

  • Gerlach, L.; Stuckmann, F.; Blume, H.; Payá-Vayá, G. (2020): Issue-Slot Based Predication Encoding Technique for VLIW ProcessorsInternational Conference on Modern Circuits and Systems Technologies (MOCAST) on Electronics and Communications
    DOI: 10.1109/MOCAST49295.2020.9200304
  • Karrenbauer, J.; Gerlach, L.; Payá-Vayá, G.; Blume, H. (2020): Design Space Exploration Framework for Tensilica-Based Digital Audio Processors in Hearing AidsInternational Conference on Modern Circuits and Systems Technologies (MOCAST) on Electronics and Communications
    DOI: 10.1109/MOCAST49295.2020.9200250
  • Kaufmann, M.; Lueders, M.; Cetin, K.; Wicht, B. (2020): A Monolithic E-Mode GaN 15W 400V Offline Self-Supplied Hysteretic Buck Converter with 95.6% Efficiency2020 IEEE International Solid- State Circuits Conference - (ISSCC)
    DOI: 10.1109/ISSCC19947.2020.9063102
  • Kaufmann, M.; Seidel, A.; Wicht, B. (2020): Long, Short, Monolithic-The Gate Loop Challenge for GaN DriversIEEE Custom Integrated Circuits Conference (CICC)
    DOI: 10.1109/CICC48029.2020.9075937
  • Kochdumper, N.; Tarraf, A.; Rechmal, M.; Olbrich, M.; Hedrich, L.; Althoff, M. (2020): Establishing Reachset Conformance for the Formal Analysis of Analog CircuitsProceedings APSDAC 2020
    DOI: 10.1109/ASP-DAC47756.2020.9045120
  • Olbrich, M. (2020): Extended Probability Distribution ArithmeticIEEE 2nd International Conference on Electronics, Control, Optimization and Computer Science (ICECOCS)
    DOI: 10.1109/ICECOCS50124.2020.9314534
  • Rechmal-Lesse, M.; Koroa, G. A.; Adhisantoso, Y. G; Olbrich, M. (2020): Automated Model Generation Including Variations for Formal Verification of Nonlinear Analog Circuits18th IEEE International New Circuits and Systems Conference (NEWCAS)
    DOI: 10.1109/NEWCAS49341.2020.9159822
  • Rechmal-Lesse, M.; Koroa, G. A.; Adhisantoso, Y. G; Olbrich, M. (2020): Automatically Generated Nonlinear Analog Circuit Models Enclosing Variations with Intervals and Affine Forms for Reachability Analysis23rd International Symposium on Design and Diagnostics of Electronic Circuits {\&} Systems, {DDECS}
    DOI: 10.1109/DDECS50862.2020.9095655
  • Renz., P.; Deneke, N.; Wicht, B. (2020): Dynamic Modeling and Control of a Resonant Switched-Capacitor Converter with Switch Conductance RegulationIEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)
    DOI: 10.1109/COMPEL49091.2020.9265644
    ISSN: 1093-5142
  • Rindfleisch, C.; Wicht, B. (2020): A One-Step 325V to 3.3-to-10V 0.5W Resonant DC-DC Converter with Fully Integrated Power Stage and 80.7% Efficiency2020 IEEE International Solid- State Circuits Conference - (ISSCC)
    DOI: 10.1109/ISSCC19947.2020.9063150
  • Stanislawski, N.; Cholewa, F.; Heymann, H.; Kraus, X.; Heene, S.; Witt, M.; Thoms, S.; Blume, C.; Blume, H. (2020): Automated Bioreactor System for the Cultivation of Autologous Tissue-Engineered Vascular Grafts2020 42nd Annual International Conference of the IEEE Engineering in Medicine Biology Society (EMBC) Weitere Informationen
    DOI: 10.1109/EMBC44109.2020.9175340
  • Wahalla, M.; Paya-Vaya, G.; Blume H. (2020): CereBridge: An Efficient, FPGA-based Real-Time Processing Platform for True Mobile Brain-Computer Interfaces42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC) Weitere Informationen
    DOI: 10.1109/EMBC44109.2020.9175623
  • Weißbrich, M.; García-Ortiz, A.; Payá-Vayá, G. (2020): A Runtime-Configurable Operand Masking Technique for Energy-Efficient Approximate Processor Architectures2020 International Conference on Modern Circuit and Systems Technologies (MOCAST 2020, accepted for publication)
  • Weißbrich, M.; Roskamp, S.; Webering, F.; Blume, H.; Payá-Vayá, G. (2020): Improving the Performance of a High-Temperature DSP Using Circuit-Level Timing SpeculationCadenceLIVE Europe 2020
  • Wicht, B. (2020): Analog Building Blocks of DC-DC Converters2020 IEEE International Solid- State Circuits Conference - (ISSCC)
    DOI: 10.1109/ISSCC19947.2020.9062975
  • Arndt, O. J.; Lüders, M.; Blume, H. (2019): Statistical Performance Prediction for Multicore Applications Based on Scalability CharacteristicsIntl. Conf. Application-specific Systems, Architectures and Processors (ASAP 2019), IEEE
    DOI: 10.1109/ASAP.2019.00015
  • Behmann, N.; Blume, H. (2019): Real-Time LED Flicker Mitigation on a Tensilica Vision DSP for Digital Side Mirror SystemsCadence User Conference (CDNLive EMEA 2019), München, Germany
  • Behmann, N.; Cheng, Y.; Schleusner, J.; Blume, H. (2019): Probabilistic 3D Point Cloud Fusion on Graphics Processors for Automotive (Poster)2019 22nd International Conference on Information Fusion (FUSION), Ottawa
  • Behmann, N.; Payá Vayá, G.; Blume, H. (2019): CNN Design Space Exploration on Tensilica Vision P6 DSPCadence User Conference (CDNLive EMEA 2019), München, Germany
  • Behmann, N.; Payá Vayá, G.; Blume, H. (2019): Design Space Exploration for Convolutional Neural Networks on a 22 nm FD-SOI SoCEmbedded World Conference (ewc), Nürnberg
  • Blume, H.; Payá-Vayá, G.; Gerlach, L. (2019): KAVUAKA: A low power application specific hearing aid processor53rd Annual Conference of the German Society for Biomedical Engineering Weitere Informationen
  • Chae, Y.; Wicht, B.; Verbruggen, B.; Heydari, P.; Luong, H. (2019): Introduction to the Special Issue on the 2019 IEEE International Solid-State Circuits Conference (ISSCC)IEEE Journal of Solid-State Circuits ( Volume: 54 , Issue: 12 , Dec. 2019 )
    DOI: 10.1109/JSSC.2019.2946496
  • Divanbeigi, S.; Aditya, E.; Wang, Z.P.; Olbrich, M. (2019): Enabling Complex Stimuli in Accelerated Mixed-Signal Simulation56th ACM/ESDA/IEEE Design Automation Conference (DAC), Las Vegas, United States. Weitere Informationen
    DOI: 10.1145/3316781.3317815
    ISBN: 9781450367257
  • Funk, T.; Groeger, J.; Wicht, B. (2019): An Integrated and Galvanically Isolated DC-to-15.3 MHz Hybrid Current Sensor2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2019.8722098
  • Gerlach, L.; Payá-Vayá, G.; Blume, H. (2019): KAVUAKA: A Low Power Application Specific Hearing Aid Processor27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2019), Cuzco, Perú
    DOI: 10.1109/VLSI-SoC.2019.8920354
  • Gesper, S.; Weißbrich, M., Nolting, S.; Stuckenberg, T.; Jääskeläinen, P.; Blume, H.; Payá-Vayá, G. (2019): Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh EnvironmentsEmbedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX), 2019 International Conference on, Springer LNCS, Pythagorion, Greece
    DOI: 10.1007/978-3-030-27562-4_1
  • Karrenbauer, J.;Gerlach, L.;Payá-Vayá, G.;Blume, H. (2019): Evaluation and Optimization of a Tensilica Processor for Hearing AidsTensilica Day 2019, Hannover
  • Karrenbauer, J.;Gerlach, L.;Payá-Vayá, G.;Blume, H. (2019): Automated Design Space Exploration of Digital Audio Processors for Hearing AidsCDNLive 2019, Munich
  • Kiesel, S.; Kern, T.; Wicht, B.; Graeb, H. (2019): A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
    DOI: 10.1109/VLSI-DAT.2019.8741536
  • Lüders, M.; Arndt, O. J.; Blume, H. (2019): Multicore Performance Prediction – Comparing Three Recent Approaches in a Case StudyIntl. Workshop Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar'2019), hosted at Intl. European Conf. Parallel and Distributed Computing (Euro-Par 2019) Weitere Informationen
    DOI: 10.1007/978-3-030-48340-1_22
    ISBN: 978-3-030-48339-5
  • Olorunfemi Ojo, J. (2019): Best Papers and Star Associate Editors (2018)IEEE Journal of Emerging and Selected Topics in Power Electronics ( Volume: 7 , Issue: 4 , Dec. 2019 )
    DOI: 10.1109/JESTPE.2019.2943771
  • Quenzer-Hohmuth, S.; Messner, J.; Ritzmann, S.; Rosahl, T.; Wicht, B. (2019): Accelerated Low Gate Count Parameter Identification for Integrated Switched-Mode Power Supplies with Digital Control2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2019.8722002
  • Renz, P.; Kaufmann, M.; Lueders, M.; Wicht, B. (2019): A 3-Ratio 85% Efficient Resonant SC Converter With On-Chip Coil for Li-Ion Battery OperationIEEE Solid-State Circuits Letters ( Volume: 2 , Issue: 11 , Nov. 2019 )
    DOI: 10.1109/LSSC.2019.2927131
  • Renz, P.; Kaufmann, M.; Lueders, M.; Wicht, B. (2019): A Fully Integrated 85%-Peak-Efficiency Hybrid Multi Ratio Resonant DC-DC Converter with 3.0-to-4.5V Input and 500μA -to-120mA Load Range2019 IEEE International Solid- State Circuits Conference - (ISSCC)
    DOI: 10.1109/ISSCC.2019.8662491
  • Rother, N.; Webering, F.; John C.; Rahlf, A.; Hamacher, D.; Zech, A.; Blume, H. (2019): Verwendung von Intertialsensoren zur automatisierten Auswertung sensomotorischer Tests6. Ambient Medicine Forum
    ISBN: 973-3-7369-9961-9
  • Schleusner, J.; Neu, L.; Behmann, N.; Blume, H. (2019): Deep Learning Based Classification of Pedestrian Vulnerability Trained on Synthetic Datasets2019 IEEE 9th International Conference on Consumer Electronics (ICCE-Berlin)
    ISBN: 978-1-7281-2745-3
  • Stuckenberg, T.; Gottschlich, M.; Nolting, S.; Blume, H. (2019): Design and Optimization of an ARM Cortex-M based SoC for TCP/IP Communication in High Temperature ApplicationsEmbedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), Springer LNCS (accepted)
  • Behmann, N.; Blume, H. (2018): Real-Time LED Flicker Detection and Mitigation: Architecture and FPGA-ImplementationIEEE International Conference on Electronics (ICECS), Berlin
  • Behmann, N.; Mehltretter, M.; Kleinschmidt, S. P.; Wagner, B.; Heipke, C.; Blume, H. (2018): GPU-enhanced Multimodal Dense MatchingIEEE Nordic Circuits and Systems Conference (NORCAS), Tallinn
  • Behmann, N.; Schewior, G..; Hesselbarth, S.; Blume, H. (2018): Selective LED Flicker Detection and Mitigation Algorithm for Non-HDR Video SequencesIEEE Intl. Conf. on Consumer Electronics, Berlin
  • Bredthauer, B.; Olbrich, M.; Barke, E. (2018): Parallelization Strategies for the Detailed Routing StepAnalog 2018; 16th GMM/ITG-Symposium, VDE
    ISBN: 978-3-8007-4754-2
  • Bredthauer, B.; Olbrich, M.; Barke, E. (2018): STP - A Quadratic VLSI Placement Tool Using Graphic Processing Units17th International Symposium on Parallel and Distributed Computing, ISPDC, pp. 77-84 Weitere Informationen
    DOI: 10.1109/ISPDC2018.2018.00020
  • Divanbeigi, S.; Winkler, F.; Bergen, M.; Olbrich, M. (2018): Modeling And Accelerated Mixed-Signal Simulation Of A Control System21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS, pp. 95-100 Weitere Informationen
    DOI: 10.1109/DDECS.2018.00024
  • Dürre, J.; Paradzik, D.; Blume. H. (2018): A HOG-based real-time and multi-scale Pedestrian Detector Demonstration System on FPGA26th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2018), Monterey, CA, USA
  • Funk, T.; Wicht, B. (2018): A fully integrated DC to 75 MHz current sensing circuit with on-chip Rogowski coil2018 IEEE Custom Integrated Circuits Conference (CICC)
    DOI: 10.1109/CICC.2018.8357028
  • Fürtig, A.; Hedrich, L.; Hartong, W.; Tanguay, L.-F.; Olbrich, M.; Rechmal, M. (2018): Coverage Measures and a Unified Coverage Model for Analog Circuit DesignANALOG 2018; 16th GMM/ITG-Symposium, Munich/Neubiberg, Germany, pp. 74-79. Weitere Informationen
    ISBN: 978-3-8007-4754-2
  • Herzke, T.; Kayser, H.; Seifert, C.; Maanen, P.; Obbard, C.; Payá-Vayá, G.; Blume, H.; Hohmann, V. (2018): Open Hardware Multichannel Sound Interface for Hearing Aid Research on BeagleBone Black with openMHA: Cape4allProceedings of the Linux Audio Conference 2018
    DOI: 10.14279/depositonce-7046
  • Jaaskelainen, P.; Tervo, A.; Paya Vaya, G.; Viitanen, T.; Behmann, N.; Takala, J.; Blume, H. (2018): Transport-Triggered Soft CoresIEEE Intl. Parallel and Distributed Processing Symposium
  • Lutz, D.; Renz, P.; Wicht, B. (2018): An Integrated 3-mW 120/230-V AC Mains Micropower SupplyIEEE Journal of Emerging and Selected Topics in Power Electronics ( Volume: 6 , Issue: 2 , June 2018 )
    DOI: 10.1109/JESTPE.2018.2798504
  • Lutz, D.; Seidel, A.; Wicht, B. (2018): A 50V, 1.45ns, 4.1pJ High-Speed Low-Power Level Shifter for High-Voltage DCDC ConvertersESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)
    DOI: 10.1109/ESSCIRC.2018.8494292
  • Nolting, S.; Gesper, S.; Schmider, A.; Weißbrich, M.; Stuckenberg, T.;Blume, H.; Paya-Vaya, G. (2018): Processor Architecture Tradeoffs for On-Site Electronics in Harsh EnvironmentsCDNLive 2018, Munich
  • Quenzer-Hohmuth, S.; Ritzmann, S.; Rosahl, T.; Wicht, B. (2018): A Boost Converter with 3-6V Input and Fast Transient Digital Control Comprising a 90 ns-Latency Live-Tracking Window ADCESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)
    DOI: 10.1109/ESSCIRC.2018.8494242
  • Quenzer-Hohmuth, S.; Ritzmann, S.; Rosahl, T.; Wicht, B. (2018): ΔV/Δt-intervention control concept for improved transient response in digitally controlled boost converters2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2018.8341029
  • Rother, N.; Stuckenberg T.; Nolting S.; Uhlemann C.; Blume H. (2018): A Case Study on Multi-Softcore Aided Hardware Architectures for Powerline MAC-LayerICT.OPEN 2018 (Published)
  • Santoro, F.; Kuhn, R.; Gibson, N.; Rasera, N.; Tost, T.; Graeb, H.; Wicht, B.; Brederlow, R. (2018): A Hysteretic Buck Converter With 92.1% Maximum Efficiency Designed for Ultra-Low Power and Fast Wake-Up SoC ApplicationsIEEE Journal of Solid-State Circuits ( Volume: 53 , Issue: 6 , June 2018 )
    DOI: 10.1109/JSSC.2018.2799964
  • Seidel, A.; Wicht, B. (2018): Integrated Gate Drivers Based on High-Voltage Energy Storing for GaN TransistorsIEEE Journal of Solid-State Circuits ( Volume: 53 , Issue: 12 , Dec. 2018 )
    DOI: 10.1109/JSSC.2018.2866948
  • Seidel, A.; Wicht, B. (2018): A fully integrated three-level 11.6nC gate driver supporting GaN gate injection transistors2018 IEEE International Solid - State Circuits Conference - (ISSCC)
    DOI: 10.1109/ISSCC.2018.8310345
  • Spindeldreier, C. and Bartosch, W. and Wendrich, T. and Rasel, E. M. and Ertmer, W. and Blume, H. (2018): FPGA based Laser Frequency Stabilization using FM-SpectroscopySPIE LASE 2018, Laser Resonators, Microresonators, and Beam Control XX, San Francisco, CA, United States
    DOI: 10.1117/12.2288370
  • Thomsen, A.; Wicht, B.; Harpe, P.; Kay Law, M.; Cheol Chae, Y. (2018): Advances in energy efficient analog design2018 IEEE International Solid - State Circuits Conference - (ISSCC)
    DOI: 10.1109/ISSCC.2018.8310408
  • Weide-Zaage, K. (2018): Simulation in the Context of Harsh Environment ConditionsSurface Mount Technology Association (SMTA), Electronics in Harsh Environments Conference, Amsterdam
  • Weide-Zaage, K.; Fremont, H.; Hein, V. (2018): “New Automotive” – Considerations for Reliability, Robustness and Resilience for CMOS InterconnectsSurface Mount Technology Association (SMTA), Pan Pacific Symposium
    DOI: 10.23919/PanPacific.2018.8318993
  • Weide-Zaage, K.; Hein, V. (2018): Process, Geometry and Stack Related Reliability of Thick AlCu-Metal-TracksSurface Mount Technology Association (SMTA), Pan Pacific Symposium
    DOI: 10.23919/PanPacific.2018.8319008
  • Weide-Zaage, K.; Tan, Y.; Hein, V. (2018): Process, Geometry and Stack Related Reliability of Thick AlCu-Metal-TracksInternational Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
  • Weißbrich, M.; Najafi, A.; García-Ortiz, A.; Payá Vayá, G. (2018): ATE-Accuracy Trade-Offs for Approximate Adders and Multipliers in Pipelined Processor Datapaths2018 Third Workshop on Approximate Computing (AxC18, www.lirmm.fr/axc18)
  • Wittmann, J.; Funk, T.; Rosahl, T.; Wicht, B. (2018): A 48-V Wide- Vin 9–25-MHz Resonant DC–DC ConverterIEEE Journal of Solid-State Circuits ( Volume: 53 , Issue: 7 , July 2018 )
    DOI: 10.1109/JSSC.2018.2827953
  • Wörner, L.; Jens Grosse, J.; Warner, M.; Schubert, C.; Becker, D.; Frye, K.; Herr, W.; Wendrich, T.; Gaaloul, N.; Spindeldreier, C.; Meister, M.; Wenzlawski, A.; Marburger, J.-P.; Krutzik, M.; Henderson, V.; Bawamia, A. I.; Herrmann, S.; Müntinga, H.; Sommer, J.; Prat, A.; Peters, A.; Wicht, A.; Lüdtke, D.; Windpassiger, P.; Blume, H.; Rasel, E. M.; Schleich, W.; Braxmaier, C. (2018): Quantum Gases aboard the ISS - Capabilities of the BECCAL Project69th International Astronautical Congress (IAC 2018), Bremen, Germany Weitere Informationen
  • Arndt, O. J.; Spindeldreier, C.; Wohnrade, K.; Pfefferkorn, D.; Neuenhahn, M.; Blume, H. (2017): FPGA Accelerated NoC-Simulation – A Case Study on the Intel Xeon Phi Ringbus TopologyIntl. Symp. Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2017), ACM
    DOI: 10.1145/3120895.3120916
  • Arndt, O. J.; Träger, F. D.; Moß, T.; Blume, H. (2017): Portable Implementation of Advanced Driver-Assistance Algorithms on Heterogeneous ArchitecturesHeterogeneity in Computing Workshop (HCW-17), hosted at Intl. Parallel and Distributed Processing Symp. Workshops (IPDPSW 2017), IEEE
    DOI: 10.1109/IPDPSW.2017.100
  • Behmann, N.; Blume, H. (2017): Object Detection for Mobile and Automotive - Convolutional Neural Networks (CNNs) on Tensilica Vision DSPsCadence User Conference (CDNLive EMEA 2017), München, Germany
  • Cholewa, F.; Wielage M.; Pirsch, P.; Blume, H. (2017): Synthetic Aperture Radar with Fast Factorized Backprojection: A Scalable, Platform Independent Architecture for Exhaustive FPGA Resource UtilizationInternational Conference on Radar Systems 2017 (RADAR)
  • Denicke, E.; Hartmann, H.; Geck, B.; Manteuffel, D. (2017): MIMO Backscatter Channel and Data Transmission Measurements47th European Microwave Conference (EuMC), Nuremberg, Germany, October 08-13, 2017
  • Divanbeigi, S.; Aditya, E.; Olbrich, M. (2017): Accelerated Mixed-Signal Simulations Using Multi-Core ArchitectureFrontiers in Analog CAD Weitere Informationen
    ISBN: 978-3-8007-4442-8
  • Dürre, J.; Blume, H. (2017): Teaching VHDL Design to Schoolchildren – A Scalable and Flexible FPGA FrameworkCadence User Conference (CDNLive EMEA 2017), München, Germany
  • Dürre, J.; Blume, H. (2017): SF3: A Scalabe and Flexible FPGA-Framework for Education and Rapid Prototyping, Proceedings of the International Conference on Microelectronic Systems Education (MSE 2017), Lake Louise, Canada
  • Furtig, A.; Glaeser, G.; Grimm, C.; Hedrich, L.; Heinen, S.; Lee, H.-S. L.; Nitsche, G.; Olbrich, M.; Radojicic, C.; Speicher, F. (2017): Novel Metrics for Analog Mixed-Signal Coverage20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)
    DOI: 10.1109/DDECS.2017.7934589
  • Gerlach, L.; Marquardt, D.; Payá Vayá, G.; Liu, S.; Weißbrich, M.; Doclo, S.; Blume, H. (2017): Analyzing the Trade-Off between Power Consumption and Beamforming Algorithm Performance using a Hearing Aid ASIPEmbedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2017 International Conference on, IEEE, Pythagorion, Greece Weitere Informationen
    DOI: 10.1109/SAMOS.2017.8344615
  • Giesemann, F.; Payá-Vayá, G.; Gerlach, L.; Blume, H.; Pflug, F.; von Voigt, G. (2017): Using a Genetic Algorithm Approach to Reduce Register File Pressure during Instruction SchedulingInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation 2017 (SAMOS XVII)
    DOI: 10.1109/SAMOS.2017.8344626
  • Groeger, J.; Schindler, A.; Wicht, B.; Norling, K. (2017): Optimized dv/dt, di/dt sensing for a digitally controlled slope shaping gate driver2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2017.7931209
  • Groeger, J.; Wicht, B.; Norling, K. (2017): Dynamic stability of a closed-loop gate driver enabling digitally controlled slope shaping2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
    DOI: 10.1109/PRIME.2017.7974107
  • Hartig, J.; Payá Vayá, G.; Heymann, H.; Blume, H. (2017): Tool-Supported Design Space Exploration of a Processor System for SIFT-Feature DetectionIEEE International Conference on Consumer Electronics (ICCE), Berlin, 2017
    DOI: 10.1109/ICCE-Berlin.2017.8210619
  • Hartig, J.; Payá Vayá, G.; Mentzer, N.; Blume, H. (2017): Balanced Application-Specific Processor System for Efficient SIFT-Feature DetectionIEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), Stamatis Vassiliadis Best Paper Award, 2017
    DOI: 10.1109/SAMOS.2017.8344614
  • Kiesel, S.; Kern, T.; Wicht, B. (2017): Time-domain ramped gate sensing for embedded multi-level flash in automotive applications2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)
    DOI: 10.1109/MWSCAS.2017.8053017
  • Leibold, C.; Stanislawski, N.; Blume, C.; Blume, H. (2017): A Mobile Electrochemical (Bio-)Sensor Node for a Vascular Graft BioreactorBiomedical Circuits and Systems Conference (BioCAS) 2017
  • Najafi, A.; Weißbrich, M.; Payá Vayá, G.; García-Ortiz, A. (2017): A Fair Comparison of Adders in Stochastic Regime2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)
  • Nolting, S.; Giesemann, F.; Hartig, J.; Schmider, A.; Payá-Vayá, G (2017): Application-Specific Soft-Core Vector Processor for Advanced Driver Assistance Systems27th International Conference on Field-Programmable Logic and Applications 2017, Ghent, Belgium
  • Nolting, S.; Liu, L.; Payá-Vayá, G. (2017): Two-LUT-Based Synthesizable Temperature Sensor for Virtex-6 FPGA Devices27th International Conference on Field-Programmable Logic and Applications 2017, Ghent, Belgium
  • Pohl, M.; Erstling, M.; Hein, V.; Weide-Zaage, K.; Chen, T. (2017): Differences in Reliability Effects for Thick Copper and Thick Aluminum MetallizationsIEEE International Reliability Physics Symposium (IRPS), Pages: MR-2.1 - MR-2.7
    DOI: 10.1109/IRPS.2017.7936377
  • Renz, P.; Lamprecht, P.; Teufel, D.; Wicht, B. (2017): A 40V current sensing circuit with fast on/off transition for high-voltage power management2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS)
    DOI: 10.1109/MWSCAS.2016.7870011
  • Schindler, A.; Koeppl, B.; Wicht, B.; Groeger, J. (2017): 10ns Variable current gate driver with control loop for optimized gate current timing and level control for in-transition slope shaping2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2017.7931210
  • Seidel, A.; Wicht, B. (2017): A 1.3A gate driver for GaN with fully integrated gate charge buffer capacitor delivering 11nC enabled by high-voltage energy storing2017 IEEE International Solid-State Circuits Conference (ISSCC)
    DOI: 10.1109/ISSCC.2017.7870446
  • Seifert, C.; Thiemann, J.; Gerlach, L.; Volkmar, T.; Payá-Vayá, G.; Blume, H.; van de Par, S. (2017): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a VLIW-SIMD ProcessorInternational Conference on Multimedia and Expo (ICME) 2017, IEEE
    DOI: 10.1109/ICME.2017.8019478
  • Sekar Sethu, R.; Hein, V.; Erstling, M.; Weide-Zaage, K. (2017): Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracksInternational Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), Pages: 1 - 6
    DOI: 10.1109/EuroSimE.2017.7926226
  • Stuckenberg, T.; Blume, H. (2017): A Hardware Efficient Preamble Detection Algorithm for Powerline CommunicationJournal of Communications, JCM
    DOI: 10.12720/jcm
  • Webering, F.; Payá-Vayá, G.; Aditya, E.; Dürre, J.; Blume, H. (2017): An Integrated Heated Testbench for Characterizing High Temperature ICs [Best Flash Presentation Award]ICT.OPEN2017, Amersfoort, Netherlands
  • Weide-Zaage, K.; Eichin, P.; Chen, C.; Zhao, Y.; Zhao, L. (2017): COTS - Radiation Effects Approaches and ConsiderationsSurface Mount Technology Association (SMTA), Pan Pacific Symposium (Best Paper)
  • Weide-Zaage, K.; Frémont, H.; Guédon- Gracia, A.; Feng, Y.; Chen, A. (2017): Study of Corrosion in BGA solder ballsEUROCORR 2017, 20th International Corrosion Congress (ICC) and Process Safety Congress 2017
  • Weide-Zaage, K.; Fremont, H.; Hein, V. (2017): Packages and Interconnects under Harsh ConditionsSurface Mount Technology Association (SMTA), International Conference
  • Weißbrich, M.; Payá-Vayá, G.; Gerlach, L.; Blume, H.; Najafi, A.; García-Ortiz, A. (2017): FLINT+: A Runtime-Configurable Emulation-Based Stochastic Timing Analysis Framework2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)
    DOI: 10.1109/PATMOS.2017.8106956
  • Wielage, M.; Cholewa, F.; Fahnemann, C.; Pirsch, P.; Blume, H. (2017): High Performance and Low Power Architectures: GPU vs. FPGA for Fast Factorized BackprojectionProceedings of CANDAR Symposium (2017)
  • Wielage, M.; Cholewa, F.; Riggers, C.; Pirsch, P.; Blume, H. (2017): Parallelization Strategies for Fast Factorized Backprojection SAR on Embedded Multi-Core Architectures2017 IEEE International Conference on Microwave, Communications, Antennas and Electronic Systems
  • Wittmann, J.; Funk, T.; Rosahl, T.; Wicht, B. (2017): A 12–48 V wide-vin 9–15 MHz soft-switching controlled resonant DCDC converterESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
    DOI: 10.1109/ESSCIRC.2017.8094597
  • Barke, E.; Fürtig, A.; Gläser, G.; Grimm, C.; Hedrich, L.; Heinen, S.; Hennig, E.; Lee H.-S. L.; Nebel, W.; Nitsche, G.; Olbrich, M.; Radojicic, C.; Speicher, F. (2016): Embedded tutorial: Analog-/mixed-signal verification methods for AMS coverage analysis2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) Weitere Informationen
  • Barner, A.; Wittmann, J.; Rosahl, T.; Wicht, B. (2016): A 10 MHz, 48-to-5V synchronous converter with dead time enabled 125 ps resolution zero-voltage switching2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2016.7467859
  • Baydakov, K.; Roskamp, S.; Wohnrade, K.; Dürre, J.; Blume, H. (2016): A Scalable Architecture for Low-Latency Network-Encryption in Low-Power DevicesPoster-Session at the 26th International Conference on Field-Programmable Logic and Applications (FPL), Lausanne, Switzerland
  • Behmann, N.; Seifert, C.; Payá Vayá, G.; Blume, H.; Jääskeläinen, P.; Multanen, J.; Kultala, H.; Takala, J.; Thiemann, J.; van de Par, S. (2016): Customized High Performance Low Power Processor for Binaural Speaker LocalizationInternational Conference on Electronics, Circuits and Systems (ICECS 2016), IEEE
  • C. Leibold, J. Wilkening, C. Blume, H. Blume (2016): A Toolchain for the 3D-Visualization of Bioartificial Vascular Grafts based on Ultrasound Images Biomedical Circuits and Systems Conference (BioCAS) 2016
  • Cholewa, F.: Wielage, M.; Pirsch, P.; Blume, H. (2016): An FPGA Architecture for Velocity Independent Backprojection in FMCW-based SAR SystemsThe 16th IEEE International Symposium on Signal Processing and Information Technology (ISSPIT2016)
  • Divanbeigi, S.; Lee, H.-S. L.; Röhrig E.; Olbrich, M.; Barke E. (2016): Modeling of Linear Stimuli for Accelerated Mixed-Signal Simulations15. ITG/GMM Fachtagung ANALOG 2016, Verifikation von Schaltungen und Systemen für das Internet der Dinge, Bremen, Germany Weitere Informationen
    ISBN: 978-3-8007-4265-3
  • Dürre, J.; Payá Vayá, G.; Blume, H. (2016): Teaching Digital Logic Circuit Design via Experiment-Based Learning - Print your own Logic CircuitProceedings of the 20th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI 2016), Orlando, USA
  • Gerlach, L.; Payá Vayá, G.; Blume, H. (2016): Efficient Emulation of Floating-Point Arithmetic on Fixed-Point SIMD Processors2016 IEEE International Workshop on Signal Processing Systems (SiPS), Dallas, United States Weitere Informationen
    DOI: 10.1109/SiPS.2016.52
  • Gerlach, L.; Payá-Vayá, G.; Blume, H. (2016): A Low Latency Multichannel Audio Interface for Low Power SIMD Digital Signal ProcessorsICT.OPEN2016, Amersfoort, Netherlands
    ISBN: 978-90-73461-932
  • Gläser, G.; Lee, H.S. L.; Olbrich, M.; Barke, E. (2016): Knowing your AMS system's limits: system acceptance region exploration by using automated model refinement and accelerated simulationForum on Specification and Design Languages (FDL)
    DOI: 10.1109/FDL.2016.7880383
  • Guédon-Gracia, A.; Frémont, H.; Delétage, J.-Y.; Weide-Zaage, K. (2016): Corrosion study on BGA assembliesSurface Mount Technology Association (SMTA), Pan Pacific Symposium
  • Hackel, J.; Seidel, A.; Wittmann, J.; Wicht, B. (2016): Capacitive Gate Drive Signal Transmission with Transient Immunity up to 300 V/nsANALOG 2016; 15. ITG/GMM-Symposium
    ISBN: 016 978-3-8007-4265-3
  • Hein, V.; Ackermann, M.; Erstling, M.; Liew, .; Weide-Zaage, K. (2016): A Design for a Highly Robust AlCu - W-Plug - Metallization StackSurface Mount Technology Association (SMTA), Pan Pacific Symposium
  • Liu, Y.; Weide-Zaage, K. (2016): Thermal-Electric-Mechanical Simulation of a Multilevel Metallization SystemIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2016.7463354
  • Lutz, D.; Renz, P.; Wicht, B. (2016): A 120/230 Vrms-to-3.3V micro power supply with a fully integrated 17V SC DCDC converterESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference
    DOI: 10.1109/ESSCIRC.2016.7598338
  • Lutz, D.; Renz, P.; Wicht, B. (2016): A 10mW fully integrated 2-to-13V-input buck-boost SC converter with 81.5% peak efficiency2016 IEEE International Solid-State Circuits Conference (ISSCC)
    DOI: 10.1109/ISSCC.2016.7417988
  • Meinl, F.; Kunert, M.; Blume, H. (2016): Hardware Acceleration of Maximum-Likelihood Angle Estimation for Automotive MIMO RadarsConference on Design & Architectures for Signal & Image Processing (DASIP), 2016 (accepted for publication)
  • Meyer, B. T.; Mallidi, S. H.; Castro Martínez, A. M.; Payá-Vayá, G.; Kayser, H.; Hermansky, H. (2016): Performance Monitoring for Automatic Speech Recognition in Noisy Multi-Channel Environments2016 IEEE Spoken Language Technology Workshop (SLT)
    DOI: 10.1109/SLT.2016.7846244
  • Nolting, S.; Payá Vayá, G.; Giesemann, F.; Blume, H. (2016): Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
    DOI: 10.1109/IPDPSW.2016.158
  • Quenzer-Hohmuth, S.; Ritzmann, S.; Rosahl, T.; Wicht, B. (2016): Boost converter with load dependent adaptive controller for improved transient response2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
    DOI: 10.1109/PRIME.2016.7519468
  • Rath, J.; Dürre, J.; Blume, H. (2016): A General Purpose FPGA-Accelerator with Standard USB 3.0 InterfacePoster-Session at the 26th International Conference on Field-Programmable Logic and Applications (FPL), Lausanne, Switzerland
  • Rindfleisch, C.; Wicht, B. (2016): Efficiency impact of air-cored inductors in multi-MHz power converters2016 18th European Conference on Power Electronics and Applications (EPE'16 ECCE Europe)
    DOI: 10.1109/EPE.2016.7695433
  • Schindler, A.; Koeppl, B.; Pottbaecker, A.; Zannoth, M.; Wicht, B. (2016): Gate driver with 10 / 15ns in-transition variable drive current and 60% reduced current dipESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference
    DOI: 10.1109/ESSCIRC.2016.7598308
  • Spindeldreier, C.; Wendrich, T.; Rasel, E. M.; Ertmer, W.; Blume, H. (2016): FPGA-based Frequency Estimation of a DFB laser using Rb Spectroscopy for Space MissionsInternational Conference on Application-specific Systems, Architectures and Processors (ASAP 2016), IEEE
    DOI: 10.1109/ASAP.2016.7760795
    ISBN: 978-1-5090-1503-0
  • Weide-Zaage, K.; Xu, P. (2016): Simulation of Needle Bumps in a Package-on-Package StructureIMAPS Nordic International Microelectronics And Packaging Society, Nordic Chapter
  • Wielage, M.; Cholewa, F.;Pirsch, P.;Blume, H. (2016): Experimental violation of the Start-Stop-Approximation using a Holistic Rail-based UWB FMCW-SAR System11th European Conference on Synthetic Aperture Radar (EUSAR 2016)
  • Wittmann, J.; Barner, A.; Rosahl, T.; Wicht, B. (2016): An 18 V Input 10 MHz Buck Converter With 125 ps Mixed-Signal Dead Time ControlIEEE Journal of Solid-State Circuits ( Volume: 51 , Issue: 7 , July 2016 )
    DOI: 10.1109/JSSC.2016.2550498
  • Lee, H.-S. L.; Althoff, M.; Hoelldampf, S.; Olbrich, M.; Barke, E. (2015): Automated Generation of Hybrid System Models for Reachability Analysis of Nonlinear Analog CircuitsDesign Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific, pp.725,730
    DOI: 10.1109/ASPDAC.2015.7059096
    ISBN: 978-1-4799-7790-1
  • Arndt, O. J.; Lefherz, T.; Blume, H (2015): Abstracting Parallel Programming and its Analysis Towards Framework Independent DevelopmentIntl. Symp. Embedded Multicore/Many-Core Systems-on-Chip (MCSoC-15), IEEE
    DOI: 10.1109/MCSoC.2015.22
  • Arndt, O. J.; Linde, T.; Blume, H. (2015): Implementation and Analysis of the Histograms of Oriented Gradients Algorithm on a Heterogeneous Multicore CPU/GPU ArchitectureGlobal Conf. Signal & Information Processing (GlobalSIP 2015), IEEE
    DOI: 10.1109/GlobalSIP.2015.7418429
  • Bartels, C.; Zhang, C.; Payá-Vayá, G.; Blume, H. (2015): A Synthesizable Temperature Sensor on FPGA using DSP-Slices for Reduced Calibration Overhead and Improved StabilityArchitecture of Computing Systems (ARCS 2015), Best Paper Award
    ISBN: ISBN 978-3-319-16086-3
  • Behmann, N.; Arndt, O. J.; Blume, H. (2015): Parallel Implementation of Real-Time Block-Matching based Motion Estimation on Embedded Multi-Core ArchitecturesICT.OPEN 2015
  • Funk, T.; Wittmann, J.; Rosahl, T.; Wicht, B. (2015): A 20 V, 8 MHz resonant DCDC converter with predictive control for 1 ns resolution soft-switching2015 IEEE International Symposium on Circuits and Systems (ISCAS)
    DOI: 10.1109/ISCAS.2015.7168990
  • Gerlach, L.; Payá Vayá, G.; Blume, H. (2015): An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors2015 IEEE Workshop on Signal Processing Systems, Hangzhou, China Weitere Informationen
    DOI: 10.1109/SiPS.2015.7345019
  • Hesselbarth, S.;Schewior, G.;Blume, H. (2015): Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA EmulationDesign and Architectures for Signal and Image Processing (DASIP), 2015 Conference on
    ISBN: 978-1-4673-7738-6
  • Kilian, M.; Joos, J.; Wicht, B. (2015): A 3.6kW Efficiency and Switching Frequency Improved DC- DC-Converter Design with Optimized Mounting and Interconnect TechnologyProceedings of PCIM Europe 2015; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
    ISBN: 978-3-8007-3924-0
  • Kock, M.; Busch, S.; Blume, H. (2015): Hardware Accelerator for Minimum Mean Square Error Interference AlignmentIEEE DSP 2015
  • Lee, H.-S. L.; Olbrich, M.; Barke, E. (2015): Analog Mixed-Level Modeling for Accelerated Simulation to Increase the Analog CoverageFDL 2015, Forum on specification & Design Languages, Barcelona, Special Session "Towards Analog-/Mixed-Signal Coverage"
  • Leibold, C.; Kornau, N.; Wilhelmi, M.; Blume, C.; Blume, H. (2015): An electronic encapsulated Monitoring System for a Vascular Graft BioreactorBiomedical Circuits and Systems Conference (BioCAS) 2015
    DOI: 10.1109/BioCAS.2015.7348338
  • Leibold, C.; Wahalla, M.; Wilhelmi, M; Blume, C.; Blume, H. (2015): A Real-time Monitoring System Controller for Medical Tissue Engineering BioreactorsIEEE International Conference on Consumer Electronics (ICCE) 2015
    DOI: 10.1109/ICCE.2015.7066310
  • Lutz, D.; Renz, P.; Wicht, B. (2015): Low-Power-SC-Wandler mit hoher variabler EingangsspannungMPC / Multi-Projekt-Chip-Gruppe Baden-Württemberg : Tagungsband zum Workshop der Multiprojekt-Chip-Gruppe Baden-Württemberg ; 53. Workshop on Microelectronics, 6. Februar 2015, Hochschule Esslingen, Germany
    ISSN: 1868-9221
  • Meinl, F.; Schubert, E.; Kunert, M.; Blume, H. (2015): Realtime FPGA-based processing unit for a high-resolution automotive MIMO radar platformEuropean Radar Conference (EuRAD), 2015
    DOI: 10.1109/EuRAD.2015.7346275
    ISBN: 978-2-8748-7041-5
  • Meinl, F.; Schubert, E.; Kunert, M.; Blume, H. (2015): Realtime FPGA-based Processing Unit for a High-Resolution Automotive MIMO Radar PlatformProceedings of the European Microwave Week (EuMW 2015), Paris, 6.-11.9.2015
  • Moujbani, A.; Weide-Zaage, K. ; Römer, B. ; Sabath, F. (2015): GEANT4 simulations in terms of radiation hardness of commercially available SRAMIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2015.7103106
    ISBN: 978-1-4799-9949-1
  • Nolting, S.; Payá-Vayá, G.; Giesemann, F.; Blume, H. (2015): Exploring Dynamic Reconfigurable CORDIC Co-Processors Tightly Coupled with a VLIW-SIMD Soft-Processor Architecture11th International Symposium on Applied Reconfigurable Computing (ARC 2015)
  • Nowosielski, R.; Gerlach, L.; Bieband, S.; Payá-Vayá, G.; Blume, H. (2015): FLINT: Layout-Oriented FPGA-Based Methodology for Fault Tolerant ASIC DesignProceedings of Design, Automation & Test in Europe (DATE2015), Grenoble, France
    ISBN: 978-3-9815-3704-8
  • Nowosielski, R.; Hartig, J.; Payá-Vayá, G.; Blume, H.; Garcia-Ortiz, A. (2015): Exploring Different Approximate Adder Architecture Implementations in a 250°C SOI Technology1st Workshop On Approximate Computing (WAPCO), HiPEAC 2015 Weitere Informationen
  • Pfefferkorn, Daniel ; Jeschke, Hartwig; Blume, Holger (2015): Energy- and Latency-Aware Simulation of Battery-Operated Wireless Embedded Networks for Home AutomationProceedings SIES 2015
    DOI: 10.1109/SIES.2015.7185050
  • Pfefferkorn, Daniel; Schmider, Achim; Payá Vayá, Guillermo ; Neuenhahn, Martin; Blume, Holger (2015): FNOCEE: A Framework for NoC Evaluation by FPGA-based EmulationSAMOS 2015
    DOI: 10.1109/SAMOS.2015.7363663
  • Quiring, A.; Olbrich, M.; Barke, E. (2015): Fast Global Interconnnect Driven 3D FloorplanningVLSI-SoC
    DOI: 10.1109/VLSI-SoC.2015.7314436
  • Scharf, O.; Olbrich, M.; Barke, E. (2015): Split and Merge Strategies for Solving Uncertain Equations Using Affine ArithmeticProceedings of the SIMUTOOLS 2015
    DOI: 10.4108/eai.24-8-2015.2260594
  • Schindler, A.; Koeppl, B.; Wicht, B. (2015): EMC and switching loss improvement for fast switching power stages by di/dt, dv/dt optimization with 10ns variable current source gate driver2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)
    DOI: 10.1109/EMCCompo.2015.7358323
  • Schubert E.; Meinl, F.; Kunert, M; Menzel, W. (2015): High Resolution Automotive Radar Measurements of Vulnerable Road Users - Pedestrians & CyclistsInternational Conference on Microwaves for Intelligent Mobility (ICMIM), 2015 IEEE MTT-S
    DOI: 10.1109/ICMIM.2015.7117944
  • Seidel, A.; Costa, M.; Joos, J.; Wicht, B. (2015): Isolated 100% PWM gate driver with auxiliary energy and bidirectional FM/AM signal transmission via single transformer2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    DOI: 10.1109/APEC.2015.7104715
  • Seidel, A.; Salvatore Costa, M.; Joos, J.; Wicht, B. (2015): Area Efficient Integrated Gate Drivers Based on High-Voltage Charge StoringIEEE Journal of Solid-State Circuits ( Volume: 50 , Issue: 7 , July 2015 )
    DOI: 10.1109/JSSC.2015.2410797
  • Seifert, C.; Payá-Vayá, G.; Blume, H.;Herzke, T.;Hohmann, V. (2015): A Mobile SoC-Based Platform for Evaluating Hearing Aid Algorithms and ArchitecturesConsumer Electronics - Berlin (ICCE-Berlin), 2015 5th IEEE International Conference on
  • Weide-Zaage, K.; Fremont, H. (2015): Possibilities of Corrosion Simulation in Microelectronic Packages and AssembliesIMAPS Nordic International Microelectronics And Packaging Society, Nordic Chapter
  • Weide-Zaage, K.; Kludt, J.; Ackermann, M.; Hein, V.; Erstling M. (2015): Life Time Characterization for a Highly Robust MetallizationIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2015.7103123
  • Weide-Zaage, K.; Moujbani, A.; Duchamp, G.; Dubois, T.; Verdier, F.; Fremont, H. (2015): How SI/EMC and reliability issues could interact together in embedded electronic systems?IEEE International Symposium on Electromagnetic Compatibility and EMC Europe
    DOI: 10.1109/ISEMC.2015.7256363
    ISBN: 978-1-4799-6615-8
  • Weide-Zaage, K.; Moujbani, A.; Frémont, H. ; Guedon-Gracia, A. (2015): Harsh marine environment – Toward corrosion simulationSurface Mount Technology Association (SMTA), Pan Pacific Symposium
  • Wittmann, J.; Barner, A.; Rosahl, T.; Wicht, B. (2015): A 12V 10MHz buck converter with dead time control based on a 125 ps differential delay chainESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)
    DOI: 10.1109/ESSCIRC.2015.7313859
  • Wittmann, J.; Rindfleisch, C.; Wicht, B. (2015): Substrate coupling in fast-switching integrated power stages2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD)
    DOI: 10.1109/ISPSD.2015.7123459
  • Wittmann, J.; Wicht, B. (2015): A configurable sawtooth based PWM generator with 2 ns on-time for >50 MHz DCDC converters2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
    DOI: 10.1109/PRIME.2015.7251089
  • Yasar, I.; Staudt, R.; Jiago Teffo, C.; Schoch, B.; Stoof, T.; Wittmann, J.; Wicht, B. (2015): Flächenoptimierte Bandgap-Referenz für Low-Power- Anwendungen mit 2,5 – 5,5 V Versorgung
  • Arndt, O. J.; Becker, D.; Giesemann, F.; Payá Vayá, G.; Bartels, C.; Blume, H. (2014): Performance Evaluation of the Intel Xeon Phi Manycore Architecture Using Parallel Video-Based Driver Assistance AlgorithmsIntl. Conf. Embedded Computer Systems (SAMOS XIV), IEEE (125 - 132)
    DOI: 10.1109/SAMOS.2014.6893203
  • Brückner, H.-P.; Spindeldreier, C.; Blume, H. (2014): Design and Evaluation of a Hardware-Accelerator for Energy Efficient Inertial Sensor Fusion on Heterogeneous SoC ArchitecturesThe 15th International Conference on Biomedical Engineering IFMBE Proceedings, 43, Goh, James, Springer International Publishing (227-230)
    DOI: 10.1007/978-3-319-02913-9_58
    ISBN: 978-3-319-02912-2
  • Brückner, H.-P.; Theimer, W.; Blume, H. (2014): Real-Time Low Latency Movement Sonification in Stroke Rehabilitation Based on a Mobile PlatformConsumer Electronics (ICCE), 2014 IEEE International Conference on, (264-265)
    DOI: 10.1109/ICCE.2014.6775997
    ISBN: 978-1-4799-1290-2
  • Cholewa, F.; Pfitzner, M.; Fahnemann, C.; Pirsch, P.; Blume, H. (2014): Synthetic Aperture Radar with Backprojection: A Scalable, Platform Independent Architecture for Exhaustive FPGA Resource UtilizationInternational Radar Conference 2014 (RADAR)
  • Dellavale, D.; Kock, M.; Blume, H.; Alam, M.; Schwabe, K.; Krauss, J. K. (2014): Implementation of Phase-to-Amplitude Coupling Analysis Algorithms in Deep Brain Stimulation DevicesDGBMT 2014
  • Denicke, E.; Geck; B. (2014): A Network Model for Evaluating MIMO Backscatter Systems Considering Mutual CouplingGerman Microwave Conference (GeMiC 2014), Aachen, Germany, March 10-12, 2014
  • Fenzi, M.; Mentzer, N.; Payá Vayá, G.; Nguyen, T.; Risse, T.; Blume, H.; Ostermann, J.; (2014): Automatic Situation Assessment for Event-driven Video AnalysisProceedings of 11th IEEE International Conference on Advanced Video and Signal-Based Surveillance (2014)
    DOI: 10.1109/AVSS.2014.6918641
  • Giesemann, F.; Paya Vaya, G.; Blume, H.; Limmer, M.; Ritter, W. (2014): A Comprehensive ASIC/FPGA Prototyping Environment for Exploring Embedded Processing Systems for Advanced Driver Assistance ApplicationsInternational Conference on Embedded Computer Systems: Architecture, Modeling and Simulation (SAMOS), 2014
  • Hartig, J.; Gerlach, L.; Payá-Vayá, G.; Blume, H. (2014): Customizing a VLIW-SIMD Application-Specific Instruction-Set Processor for Hearing Aid DevicesIEEE International Workshop on Signal Processing Systems 2014 (SiPS), Belfast, UK
    DOI: 10.1109/SiPS.2014.6986072
  • Hesselbarth, S.; Baumgart, T.; Blume, H. (2014): Hardware-assisted Power Estimation for Design-stage Processors using FPGA Emulation24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014
    DOI: 10.1109/PATMOS.2014.6951877
  • Kärgel, M.; Olbrich, M.; Barke, E. (2014): Simulation Based Verification with Range Based Signal Representations for Mixed-Signal SystemsSBCCI
    DOI: 10.1145/2660540.2661010
    ISBN: 978-1-4503-3156-2
  • Katzschke, C.; Sohn, M.-P.; Olbrich, M.; Meyer zu Bexten, V.; Tristl, M.; Barke, E. (2014): Application of Mission Profiles to Enable Cross-Domain Constraint-Driven DesignDATE, 1-6
    DOI: 10.7873/DATE.2014.079
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Kovacz, C.; Hein, V. (2014): Reliability Performance of Different Layouts of Wide Metal Tracks IEEE International Reliability Physics Symposium
    DOI: 10.1109/IRPS.2014.6861153
    ISBN: 978-1-4799-3317-4
  • Krause, A.; Olbrich, M.; Barke, E. (2014): Intervallwertige Support Vector Machines zur Verhaltensmodellierung analoger Schaltungen mit Parametervariationen Tagungsband Analog2014
    ISBN: 978-3-8007-3638-6
  • Krause, Anna; Olbrich, Markus; Barke, Erich (2014): Variation-Aware Behavioral Models of Analog Circuits Using Support Vector Machines with Interval ParametersComputer Science and Electronic Engineering Conference (CEEC), 2014 6th
    DOI: 10.1109/CEEC.2014.6958566
  • Meinl, F.; Kunert, M.; Blume, H. (2014): Massively Parallel Signal Processing Challenges within a Driver Assistant Prototype Framework - First Case Study Results with a Novel MIMO-RadarInternational Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIV) (2014)
    DOI: 10.1109/SAMOS.2014.6893232
  • Meinshausen, L.; Weide-Zaage, K.; Goldbeck, B.; Moujbani, A.; Kludt, J.; Frémont, H. (2014): Electromigration Reliability of Cylindrical Cu Pillar SnAg3.0Cu0.5 BumpsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2014.6813775
    ISBN: 978-1-4799-4791-1
  • Mentzer, N.; Payá Vayá, G.; Blume, H.; von Egloffstein, N.; Ritter, W. (2014): Instruction-Set Extension for an ASIP-based SIFT Feature ExtractionProceedings of International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation
    DOI: 10.1109/SAMOS.2014.6893230
  • Rindfleisch, C.; Wittmann, J.; Wicht, B. (2014): Substratkoppeln in schnell schaltenden integrierten LeistungsendstufenMPC / Multi-Projekt-Chip-Gruppe Baden-Württemberg : Tagungsband zum Workshop der Multiprojekt-Chip-Gruppe Baden-Württemberg ; 52. Workshop on Microelectronics, 11. Juli 2014, Hochschule Künzelsau, Germany
    ISSN: 1862-7102
  • Schewior, G.; Zahl, C.; Blume, H.; Wonneberger, S.; Effertz, J. (2014): HLS-based FPGA Implementation of a Predictive Block-based Motion Estimation Algorithm - A Field ReportDesign and Architectures for Signal and Image Processing (DASIP), 2014 Conference on
    DOI: 10.1109/DASIP.2014.7115633
    ISBN: 979-10-92279-05-4
  • Schmädecke, I.; Blume, H. (2014): Design Space Exploration of Hardware Architectures (accepted for publication) for Content Based Music Classification32nd INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS 2014 (ICCE)
  • Seidel, A.; Costa, M.; Joos, J.; Wicht, B. (2014): Bootstrap circuit with high-voltage charge storing for area efficient gate drivers in power management systemsESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)
    DOI: 10.1109/ESSCIRC.2014.6942046
  • Weide-Zaage, K.; Kludt, J.; Fremont, H.; Tetelin, A. (2014): Investigation of Chip-Package Interaction in 3D IntegrationSurface Mount Technology Association (SMTA), Pan Pacific Symposium
  • Weide-Zaage, K.; Moujbani, A.; Kludt, J. (2014): Simulation in 3D Integration and TSVIEEE 5th Latin American Symposium on Circuits and Systems
    DOI: 10.1109/LASCAS.2014.6820324
    ISBN: 978-1-4799-2506-3
  • Wielage, M.; Blume, H. (2014): The Use of the LEON2 Microprocessor as a Control Instance for Real-Time SAR Image ProcessingSynthetic Aperture Radar, 2014. EUSAR. 10th European Conference
    ISBN: 978-3-8007-3607-2
  • Winter, L.; Alam, M.; Schwabe, K.; Heissler, H.; Delavalle, D.; Blume, H.; Lütjens, G.; Kahl, K.; Krauss, K. (2014): Neuronal activity in the bed nucleus of the stria terminalis/ internal capsule in OCD in response to neutral and aversive stimuli (accepted for publication)65.Jahrestagung der Deutsche Gesellschaft für Neurochirurgie (DGNC)
  • Wittmann, J.; Rosahl, T.; Wicht, B. (2014): A 50V high-speed level shifter with high dv/dt immunity for multi-MHz DCDC convertersESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)
    DOI: 10.1109/ESSCIRC.2014.6942044
  • Wittmann, J.; Seidel, A.; Wicht, B. (2014): Efficiency modeling for MHz DCDC converters at 40V input voltage range
    DOI: 10.5194/ars-12-111-2014
  • Wursthorn, J.; Knapp, H.; Wicht, B. (2014): A millimeter-wave power amplifier concept in SiGe BiCMOS technology for investigating HBT physical limitations
  • Weide-Zaage, K.; Kludt, J.; Meinshausen, L.; Farajzadeh, A. (2013): Synergiepotenzial von finite Elemente Simulationen bei der Optimierung des Entwurfsprozesses von MetallisierungenVDE ITG, 24. GMM Workshop, Testmethoden und Zuverlässigkeit von Schaltungen und Systemen
  • Arndt, O. J.; Becker, D.; Banz, C.; Blume, H. (2013): Parallel Implementation of Real-Time Semi-Global Matching on Embedded Multi-Core ArchitecturesInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), IEEE (56 - 63)
    DOI: 10.1109/SAMOS.2013.6621106
  • Brückner, H.-P.; Blume, H. (2013): Analysis of Multiple Hardware Platforms for Power-Efficient, Low-Latency Interactive Movement Sonification in Stroke-RehabilitationProceedings of 1st Russian-German Conference on Biomedical Engineering, Hannover, B. Chichkoc, E. Fadeeva, L.A. Kahr, T. Ortmaier, PZH Verlag (83)
    ISBN: 978-3-944586-25-0
  • Brückner, H.-P.; Blume, H. (2013): Comparison of Hardware Platforms for Low-Power, Real-Time Interactive Movement SonificationMultisensory Motor Behavior: Impact of Sound, International Conference Weitere Informationen
  • Brückner, H.-P.; Nowosielski, R.; Kluge, H.; Blume, H. (2013): Mobile and Wireless Inertial Sensor Platform for Motion Capturing in Stroke Rehabilitation SessionsAdvances in Sensors and Interfaces (IWASI), 2013 5th IEEE International Workshop on, (14-19)
    DOI: 10.1109/IWASI.2013.6576085
    ISBN: 978-1-4799-0039-8
  • Brückner, H.-P.; Spindeldreier, C.; Blume, H. (2013): Modification and fixed-point analysis of a Kalman filter for orientation estimation based on 9D inertial measurement unit dataEngineering in Medicine and Biology Society (EMBC), 2013 35th Annual International Conference of the IEEE, (3953-3956)
    DOI: 10.1109/EMBC.2013.6610410
    ISBN: 1557-170X
  • Brückner, H.-P.; Spindeldreier, C.; Blume, H. (2013): Energy-Efficient Inertial Sensor Fusion on Heterogeneous FPGA-Fabric / RISC System on ChipSensing Technology (ICST), 2013 Seventh International Conference on, (506-511)
    DOI: 10.1109/ICSensT.2013.6727704
    ISBN: 978-1-4673-5220-8
  • Dellavale, D.; Leibold, C.; Payá-Vayá, G.; Blume, H.; Alam, M.; Schwabe, K.; Krauss, J. (2013): Optimization of a Phase–to–Amplitude Coupling Algorithm for Real–Time Processing of Brain Electrical SignalsConference ICT.OPEN 2013, Proceedigns of ICT.OPEN 2013, (68--73) Weitere Informationen
    ISBN: 978-90-73461-84-0
  • Denicke, E.; Härke, D.; Geck, B. (2013): Investigating Multi-Antenna RFID Systems by Means of Time-Varying Scattering Parameters7th European Conference on Antennas and Propagation (EuCAP 2013), Gothenburg, Sweden, April 08-12, 2013
  • Ehrhart, A.; Wicht, B.; Chen, K. (2013): A current-mode buck-boost DC-DC converter with fast transient responseMPC / Multi-Projekt-Chip-Gruppe Baden-Württemberg : Tagungsband zum Workshop der Multiprojekt-Chip-Gruppe Baden-Württemberg : Workshop Februar 2013, Mannheim
    ISSN: 1868-9221
  • Ehrhart, A.; Wicht, B.; Lin, M.; Huang, Y.; Lee, Y.; Chen, K. (2013): Adaptive pulse skipping and adaptive compensation capacitance techniques in current-mode buck-boost DC-DC converters for fast transient response2013 IEEE 10th International Conference on Power Electronics and Drive Systems (PEDS)
    DOI: 10.1109/PEDS.2013.6527047
  • Gottschling, P.; Rosahl, T.; Wicht, B. (2013): Analyse des SEPIC-Spannungswandlers für Automotive-AnwendungenMPC / Multi-Projekt-Chip-Gruppe Baden-Württemberg : Tagungsband zum Workshop der Multiprojekt-Chip-Gruppe Baden-Württemberg : Workshop Juli 2013, Konstanz
    ISSN: 1868-9221
  • Hesselbarth; Blume, S.; Holger (2013): Methoden zur applikationsspezifischen Verlustleitungsoptimierung für eingebettete Prozessoren15. ITG-Fachtagung für Elektronische Medien (Fernsehsehminar), Informationstechnische Gesellschaft im VDE Weitere Informationen
  • Hölldampf, S.; Lee, H.-S. L.; Olbrich, M.; Barke, E. (2013): Generation of Piecewise-Linear Semiconductor Models for Accelerated Mixed-Signal SimulationFrontiers in Analog CAD 2013 (FAC 2013) Weitere Informationen
  • Kärgel, M.; Olbrich, M.; Barke, E. (2013): Verification of Mixed-Signal Systems with Range Based Signal RepresentationsFrontiers in Analog CAD 2013 (FAC 2013)
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V. (2013): Investigation of Thermomigration in Aluminum MetallizationIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2013.6529896
    ISBN: 978-1-4673-6138-5
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V. (2013): Characterization of a new designed octahedron slotted metal track by simulationsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2013.6529907
    ISBN: 978-1-4673-6138-5
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V. (2013): Deformation of Slotted Metal TracksIEEE, Integrated Reliability Workshop Final Report (IIRW), pp. 161-165
    DOI: 10.1109/IIRW.2013.6804184
    ISBN: 978-1-4799-0350-4
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V. (2013): Overlap Design for Higher Tungsten Via Robustness in AlCu MetallizationsIEEE, Integrated Reliability Workshop Final Report (IIRW) pp. 137-141
    DOI: 10.1109/IIRW.2013.6804178
    ISBN: 978-1-4799-0350-4
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V.; Moujbani, A. (2013): Optimierung von Metallisierungsstrukturen mit Hilfe von thermisch-elektrisch-mechanischen FE-SimulationenVDE ITG/GI/GMM-Fachtagung
    ISBN: 978-3-8007-3539-6
  • Kock, M.; Blume, H. (2013): Effiziente Hardwarearchitekturen für Interference Alignment in drahtlosen Kommunikationssystemen15. ITG-Fachtagung für Elektronische Medien (Fernsehsehminar)
  • Kollmitzer, M.; Olbrich, M.; Barke, E. (2013): Analysis and Modeling of Minority Carrier Injection in Deep-Trench Based BCD Technologies9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME 2013), (245-248)
    DOI: 10.1109/PRIME.2013.6603160
  • Lin, M.; Huang, Y.; Ehrhart, A.; Lee, Y.; Chiu, C.; Wicht, B.; Chen, K. (2013): Authentic mode-toggled detector with fast transient response under wide load range buck-boost converter2013 IEEE International Symposium on Circuits and Systems (ISCAS)
    DOI: 10.1109/ISCAS.2013.6572498
  • Meinshausen, L.; Weide-Zaage, K.; Fremont, H. (2013): Influence of contact geometry variations on the life time distribution of IC packages during electromigration testingIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2013.6529895
    ISBN: 978-1-4673-6138-5
  • Nowosielski, R.; Gerlach, L.; Payá-Vayá, G.; Hesselbarth, S.; Blume, H. (2013): Methodology for Observation and Evaluation of Fault Tolerance Implementations inside High Temperature ASICsConference ICT.OPEN 2013, Proceedings of ICT.OPEN 2013, (97--101), Eindhoven, Netherlands Weitere Informationen
    ISBN: 978-90-73461-84-0
  • Payá-Vayá, G. (2013): ASIP-Architekturen für digitale Hörgerätesysteme – Ergebnisse aus dem Exzellenzcluster Hearing4allDESIGN&ELEKTRONIK-Entwicklerforum "Electronics goes medical", Tagunsunterlagen DESIGN&ELEKTRONIK-Entwicklerforum "Electronics goes medical"
    ISBN: 978-3-645-50123-1
  • Payá-Vayá, G.; Seifert, C.; Blume, H. (2013): Design of Application-Specific Instruction-Set Processors for Digital Hearing Aid Systems1st Russian German Conference on Biomedical Engineering (RGC 2013), Proceedings of 1st Russian German Conference on Biomedical Engineering (RGC 2013), B. Chichkov, E. Fadeeva, L.A. Kahrs, T. Ortmaier, PZH Verlag (32)
    ISBN: 978-3-944586-25-0
  • Pfitzner, M.; Cholewa, F.; Pirsch, P.; Blume, H. (2013): FPGA-based Architecture for real-time SAR processing with integrated Motion CompensationThe 4th Asia-Pacific Conference on Synthetic Aperture Radar (APSAR)
  • Pfitzner, M.; Cholewa, F.; Pirsch, P.; Blume, H. (2013): Development and Potential of Real-Time FPGA Frequency-Based SAR Image Processing for Short-Range FMCW ApplicationsThe 2013 International Conference on Radar (RADAR2013)
  • Scharf, O.; Olbrich, M.; Barke, E. (2013): Lösungsverfahren für nichtlineare implizite Gleichungssysteme unter Verwendung von Affiner Arithmetik und Gebietsaufteilungen ANALOG 2-1, VDE-Verlag
    ISBN: 978-3-8007-3467-2
  • Schewior, G.; Blume, H. (2013): Enhanced Motion Estimation for Driver Assistance Systems - Integration of a Curved Road ModelConsumer Electronics (GCCE), 2013 IEEE 2nd Global Conference on, (483-487)
    DOI: 10.1109/GCCE.2013.6664897
    ISBN: 978-1-4799-0890-5
  • Schindler, A.; Koeppl, B.; Wicht, B. (2013): EMC analysis of current source gate drivers2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)
    DOI: 10.1109/EMCCompo.2013.6735181
  • Schlobohm, J.; Weide-Zaage, K.; Rongen, R.T.H.; Voogt, F.C.; Roucou, R. (2013): Simulation of CSP-Solder Bumps with a Plastic CoreIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/EuroSimE.2013.6529979
  • Schmädecke, I.; Blume, H. (2013): High Performance Hardware Architectures for Automated Music ClassificationAlgorithms from and for Nature and Life, Springer (539-547)
    DOI: 10.1007/978-3-319-00035-0_55
    ISBN: 978-3-319-00034-3
  • Schmädecke, I.; Blume, H. (2013): Hardware-Accelerator Design for Energy-Efficient Acoustic Feature Extraction (accepted for publication)2013 IEEE 2nd Global Conference on Consumer Electronics (GCCE)
  • Schmädecke, I.; Leibold, C.; Brückner, H.-P.; Blume, H. (2013): Project-organized Education: From FPGA Prototyping to ASIC DesignMicroelectronic Systems Education (MSE), 2013 IEEE International Conference on, (9-12)
    DOI: 10.1109/MSE.2013.6566691
    ISBN: 978-1-4799-0139-5
  • Seifert, C.; Payá-Vayá, G.; Blume, H. (2013): A Multi-Channel Audio Extension Board for Binaural Hearing Aid SystemsConference ICT.OPEN 2013, Proceedings of ICT.OPEN 2013, (33--37) Weitere Informationen
    ISBN: 978-90-73461-84-0
  • Weide-Zaage, K.; Schlobohm, J.; Frémont, H.; Farajzadeh, A.; Kludt, J. (2013): 3D Integration a Thermal-Electrical-Mechanical-Reliability StudySurface Mount Technology Association (SMTA), Pan Pacific Symposium
  • Werner, N.; Payá-Vayá, G.; Blume, H. (2013): Case Study: Using the Xtensa LX4 Configurable Processor for Hearing Aid ApplicationsConference ICT.OPEN 2013, Proceedings of ICT.OPEN 2013, (27-32) Weitere Informationen
    ISBN: 978-90-73461-84-0
  • Wittmann, J.; Wicht, B. (2013): MHz-converter design for high conversion ratio2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)
    DOI: 10.1109/ISPSD.2013.6694445
  • Ackermann, M.; Hein, V.; Weide-Zaage, K. (2012): Simulation-based prediction of reliability and robustness of interconnect systems for semiconductor applicationsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESimE.2012.6191800
    ISBN: 978-1-4673-1512-8
  • Banz, C.; Blume, H.; Pirsch, P. (2012): Evaluation of penalty functions for SGM cost aggregationIntl. Archives of Photogrammetry and Remote Sensing
  • Barke, M.; Kärgel, M.; Lu, W.; Salfelder, F.; Hedrich, L.; Olbrich, M.; Radetzki, M.; Schlichtmann, U. (2012): Robustness Validation of Integrated Circuits and Systems4th Asia Symposium on Quality Electronic Design (ASQED), 2012 (145-154)
    DOI: 10.1109/ACQED.2012.6320491
  • Blume, S.; Blume, H.; Pirsch, P. (2012): Unifying State-of-the-art Range and Precision Analyses for the Design of Digital Signal Processing HardwareICT.OPEN 2012 Conference
  • Brückner, H.-P.; Blume, H. (2012): Interaktive Bewegungssonifikation zur Unterstützung der Schlaganfall-RehabilitationElectronics goes medical 2012, Design & Elektronik, Weka Fachmedien GmbH
    ISBN: 978-3-645-50105-7
  • Brückner, H.-P.; Spindeldreier, C.; Blume, H.; Schoonderwaldt, E.; Altenmüller, E. (2012): Evaluation of Inertial Sensor Fusion Algorithms in Grasping Tasks Using Real Input DataWearable and Implantable Body Sensor Networks (BSN), 2012 Ninth International Conference on, (189-194)
    DOI: 10.1109/BSN.2012.9
    ISBN: 978-1-4673-1393-3
  • Brückner, H.-P.; Wielage, M.; Blume, H. (2012): Comparison of a Sensor Fusion Algorithm Implementation on a C674X DSP and a CORTEX A8 Core5th European DSP Education and Research Conference, EDERC2012, (15 - 19)
    DOI: 10.1109/EDERC.2012.6532216
    ISBN: 978-1-4673-4595-8
  • Brückner, H.-P.; Wielage, M.; Blume, H. (2012): Intuitive and Interactive Movement Sonification on a Heterogeneous RISC / DSP PlatformProceedings of the 18th International Conference on Auditory Display, Atlanta, GA, USA, 18-21 June 2012. Ed. Michael A. Nees, Bruce N. Walker, Jason Freeman. The International Community for Auditory Display, (75-82) Weitere Informationen
    ISBN: 2168-5126
  • Denicke, E.; Henning, M.; Rabe, H.; Geck, B. (2012): The Application of Multiport Theory for MIMO RFID Backscatter Channel Measurements42nd European Microwave Conference (EuMC), Amsterdam, The Netherlands, October 28 - November 02, 2012
  • El-Hadidy, M.; El-Absi, M.; Sit, L.; Kock, M.; Zwick, T.; Blume, H.; Kaiser, T. (2012): Improved Interference Alignment Performance for MIMO OFDM Systems by Multimode MIMO AntennasProceedings of the 17th International OFDM Workshop 2012 (InOWo'12)
  • Giesemann, F.; Payá-Vayá, G.; Blume, H. (2012): A Hardware/Software Environment for Specializing Dynamic Reconfigurable Generic VLIW-SIMD ASIP ArchitectureICT.OPEN 2012 Conference
  • Hartig, J.; Payá-Vayá, G.; Blume, H. (2012): Design and Analysis of a Structured-ASIC Architecture for Implementing Generic VLIW-SIMD ProcessorsICT.OPEN 2012 Conference
    ISBN: 978-90-73461-80-2
  • Hölldampf, S.; Lee, H.-S. L.; Zaum, D.; Olbrich, M.; Barke, E. (2012): Efficient Generation of Analog Circuit Models for Accelerated Mixed-Signal SimulationIEEE International System-on-Chip Conference 2012 (SOCC 2012), (104-109)
    DOI: 10.1109/SOCC.2012.6398386
    ISBN: 978-1-4673-1294-3
  • Kludt, J.; Ciptokusumo, J.; Weide-Zaage, K. (2012): Influence of Liner Materials on the Mechanical Stress and Migration in a Copper MetallizationIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESimE.2012.6191701
    ISBN: 978-1-4673-1512-8
  • Kock, M.; Hesselbarth, S.; Blume, H. (2012): Hardware-Accelerated Design Space Exploration Framework for Communication SystemsWireless Innovation Forum Conference on Wireless Communications Technologies and Software Defined Radio (SDR-WInnComm 2012)
  • Krause, A.; Olbrich, M.; Barke, E. (2012): Enclosing the Modeling Error in Analog Behavioral Models Using Neural Networks and Affine ArithmeticInternational Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design 2012 (SMACD 2012), (5-8)
    DOI: 10.1109/SMACD.2012.6339403
  • Meinshausen, L.; Weide-Zaage, K.; Fremont, H. (2012): Thermal Management for stackable package with stacked ICsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESimE.2012.6191700
    ISBN: 978-1-4673-1512-8
  • Nolting, S.; Payá-Vayá, G.; Schmädecke, I.; Blume, H. (2012): Evaluation of a Generic Radix-4 CORDIC Coprocessor Tightly Coupled with a Generic VLIW-SIMD ASIP ArchitectureICT.OPEN 2012 Conference
  • Nowosielski, R.; Zirkelbach, T.; Blume, H. (2012): Evaluation of the RISC-CISC Trade-off for ASIC Implementation in a 250 °C SOI-TechnologyICT.OPEN 2012 Conference
  • Payá-Vayá, G.; Burg, R.; Blume, H. (2012): Dynamic Data-Path Self-Reconfiguration of a VLIW-SIMD Soft-Processor ArchitectureWorkshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) in conjunction with the 2012 International Conference on Field Programmable Logic and Applications (FPL 2012), (26-29) Weitere Informationen
  • Pfitzner, M.; Cholewa, F.; Pirsch, P.; Blume, H. (2012): Close-to-hardware error analysis for real-time wavenumber domain processingRADAR 2012, 7th International Conference on Radar
  • Pfitzner, M.; Cholewa, F.; Pirsch, P.; Blume, H. (2012): A flexible hardware architecture for real-time airborne Wavenumber Domain SAR processing9th European Conference on Synthetic Aperture Radar
  • Quiring, A.; Lindenberg, M.; Olbrich, M.; Barke, E. (2012): 3D Floorplanning Considering Vertically Aligned Rectilinear Modules Using T∗-treeIEEE International 3D Systems Integration Conference (3DIC), 2-1, (1-5)
    DOI: 10.1109/3DIC.2012.6263030
  • Schewior, G.; Blume, H. (2012): Model-based Improvement of Motion Vector Fields for Driver Assistance SystemsConsumer Electronics - Berlin (ICCE-Berlin), 2012 IEEE International Conference on, (231-235)
    DOI: 10.1109/ICCE-Berlin.2012.6336474
    ISBN: 978-1-4673-1546-3
  • Wittmann, J.; Neidhardt, J.; Wicht, B. (2012): EMC Optimized Design of Linear Regulators Including a Charge PumpIEEE Transactions on Power Electronics ( Volume: 28 , Issue: 10 , Oct. 2013 )
    DOI: 10.1109/TPEL.2012.2232785
  • Banz, C.; Blume, H.; Pirsch, P. (2011): Real-Time Semi-Global Matching Disparity Estimation on the GPUWorkshop on GPU in Computer Vision Applications @ International Conference on Computer Vision (ICCV), IEEE (514-521)
  • Banz, C.; Dolar, C.; Cholewa, F.; Blume, H. (2011): Instruction Set Extension for High Throughput Disparity Estimation in Stereo Image ProcessingApplication-specific Systems, Architectures and Processors (ASAP), IEEE (169-175)
  • Brückner, H.-P.; Bartels, C.; Blume, H. (2011): PC-based real-time sonification of human motion captured by inertial sensorsThe 17th Annual International Conference on Auditory Display, Budapest, Hungary, OPAKFI Egyesület, (8) Weitere Informationen
    ISBN: 978-963-8241-72-6
  • Dolar, C.; Schröder, H. (2011): Quantitative analysis of image based LCD motion de-blurring methodsProc. IEEE Int. Conference on Consumer Electronics (ICCE), (657 -658)
    DOI: 10.1109/ICCE.2011.5722793
  • Hinrichs, H.; Olbrich, M.; Barke, E. (2011): Optimization of Chip Design ProcessesAfrican Conference on Software Engineering and Applied Computing
  • Hölldampf, S.; Zaum, D.; Neumann, I.; Olbrich, M.; Barke, E. (2011): Fast Mixed-Signal Simulation using SystemCIEEE International Systems Conference 2011 (SysCon 2011)
    DOI: 10.1109/SYSCON.2011.5929046
  • Hölldampf, S.; Zaum, D.; Olbrich, M.; Barke, E (2011): Using Analog Circuit Behavior to Generate SystemC Events for an Acceleration of Mixed-Signal SimulationIEEE International Conference on Computer Design 2011 (ICCD 2011)
    DOI: 10.1109/ICCD.2011.6081384
  • Langemeyer, S.; Pirsch, P.; Blume, H. (2011): A FPGA architecture for real-time processing of variable-length FFTs2011 International Conference on Acoustics, Speech and Signal Processing, ICASSP, IEEE (8)
  • Langemeyer, S.; Pirsch, P.; Blume, H. (2011): Using SDRAMs for two-dimensional accesses of long 2^n x 2^m-point FFTs and transposingConference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS, IEEE
  • Meinshausen, L.; Weide-Zaage, K.; Petzold, M. (2011): Electro- and Thermomigration in Microbump Interconnects for 3D IntegrationIEEE, Electronic Components and Technology Conference (ECTC), pp. 1444 - 1451
    DOI: 10.1109/ECTC.2011.5898701
    ISBN: 978-1-61284-497-8
  • Nolting, S.; Vaya, P.; Blume, H. (2011): Optimizing VLIW-SIMD Processor Architectures for FPGA ImplementationICT.OPEN 2011 Conference (Veldhoven, Netherlands), USB-Proceedings
  • Pfitzner, M.; Langemeyer, S.; Pirsch, P.; Blume, H. (2011): A flexible real-time SAR processing platform for high resolution airborne image generationRADAR 2011, 6th International Conference on Radar
  • Rabe, H.; Friedrich, A.; Denicke, E.; Rolfes, I. (2011): A Monopulse Imaging Concept for Reliable Radar Level Measurements8th European Radar Conference, Manchester, UK, October 12-14, 2011, pp. 269 - 272
  • Richter, M.; Dolar, C.; Schröder, H.; Springer, P.; Erdler, O. (2011): Spatio-Temporal Regularization Featuring Novel Temporal Priors and Multiple Reference Motion EstimationProc. IEEE Int. Symposium on Broadband Multimedia Systems and Broadcast
  • Scharf, O.; Olbrich, M.; Barke, E. (2011): Anwendung der affinen Arithmetik auf das BSIMSOI-Modell zur Simulation von ParameterschwankungenANALOG 2-1, VDE-Verlag, (S. 49-54)
    ISBN: 978-3-8007-3369-9
  • Schewior, G.; Flatt, H.; Dolar, C.; Banz, C.; Blume, H. (2011): A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance ApplicationsEmbedded Computer Systems (SAMOS), 2011 International Conference on, (209-216)
    DOI: 10.1109/SAMOS.2011.6045463
    ISBN: 978-1-4577-0802-2
  • Schmädecke, I.; Blume, H. (2011): GPU-based Acoustic Feature Extraction for Electronic Media ProcessingProceedings of the 14th ITG Conference, Dortmund, Germany
  • Septinus, K.; Dragone, S.; Langner, M.; Blume, H.; Pirsch, P. (2011): A Scalable Hardware Algorithm for Demanding Timer Management in Network Systems24. PARS - Workshop am 26./27. Mai 2011, Rüschlikon, Switzerland, PARS Mitteilungen GI, ISSN 0177-0454
  • Wang, L.; Olbrich, M.; Barke, E.; Buechner, T.; Buehler, M.; Panitz, P. (2011): A Theoretical Probabilistic Simulation Framework for Dynamic Power EstimationThe 2011 International Conference on Computer-Aided Design (ICCAD 2011), (708-715)
    DOI: 10.1109/ICCAD.2011.6105407
  • Weide-Zaage, K.; Meinshausen, L.; Fremont, H. (2011): Prediction of Electromigration Induced Void Formation in TSV and SAC ContactsIEEE Congress on Engineering and Technology (CET), Pages 376-382
    ISBN: 978-1-61284-362-9
  • Wittmann, J.; Wicht, B. (2011): EMC influence of the charge pump in linear regulators - Design, simulation and measurements2011 IEEE International Symposium of Circuits and Systems (ISCAS)
    DOI: 014 10.1109/ISCAS.2011.5937824
  • Zietz, C.; Armbrecht, G.; Denicke, E.; Rolfes, I. (2011): On the Impact of Arbitrary Nozzle or Dome Configurations on Dielectric Endfire Antenna Performance in Industrial Radar Level Gauging5th European Conference on Antennas and Propagation (EuCAP 2011), Rome, Italy, April 11-15, 2011, pp. 53-57
  • Banz, C.; Hesselbarth, S.; Flatt, H.; Blume, H.; Pirsch, P. (2010): Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-ImplementationInternational Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, (SAMOS X), IEEE (93-101)
    DOI: 10.1109/ICSAMOS.2010.5642077
  • Ciptokusumo, J.; Weide-Zaage, K.; Aubel, O. (2010): Mechanical Characterization of Copper based Metallizations with different Via-Bottom GeometriesPhysical and Failure Analysis of Integrated Circuits (IPFA), 17th IEEE International Symposium
    DOI: 10.1109/IPFA.2010.5532227
    ISBN: 978-1-4244-5596-6
  • Ciptokusumo, J.; Weide-Zaage, K.; Aubel, O. (2010): Principles for Simulation of Barrier Cracking due to high StressIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESIME.2010.5464617
    ISBN: 978-1-4244-7026-6
  • Flatt, H.; Blume, H.; Pirsch, P. (2010): Mapping of a Real-Time Object Detection Application onto a Configurable RISC/Coprocessor Architecture at Full HD ResolutionInternational Conference on Reconfigurable Computing, ReConFig, IEEE (452-457)
    DOI: 10.1109/ReConFig.2010.16
  • Hinrichs, H.; Olbrich, M.; Barke, E. (2010): Performance Management and Optimization of Semiconductor Design ProjectsIAENG Transactions on Engineering Technologies Volume 4: Special Edition of the World Congress on Engineering and Computer Science 2-1, American Institute of Physics (AIP)
    DOI: 10.1063/1.3460248
  • Hinrichs, H.; Olbrich, M.; Barke, E. (2010): Optimization of Chip Design Processes using Task GraphsInternational Conference on Software Technology and Engineering (ICSTE 2010)
    DOI: 10.1109/ICSTE.2010.5608900
  • Hölldampf, S.; Zaum, D.; Quiring, A.; Neumann, I.; Schmidt, S.; Olbrich, M.; Barke, E. (2010): Beschleunigte Simulation von Mixed-Signal-Schaltungen der Automobilindustrie auf der Grundlage automatisch generierter ModelleAnalog 2-1, VDE-Verlag
    ISBN: 978-3-8007-3224-1
  • Meinshausen, L.; Weide-Zaage, K. (2010): Exploration of Migration and Stress Effects in PoPs Considering Inhomogeneous Temperature DistributionSMTA Surface Mount Technology Association, International Wafer-Level Packaging Conference (IWLPC)
  • Meinshausen, L.; Weide-Zaage, K.; Frémont, H. (2010): Underfill and mold compound influence on PoP ageing under high current and high temperature stressesElectronic System-Integration Technology Conference (ESTC)
    DOI: 10.1109/ESTC.2010.5642803
    ISBN: 978-1-4244-8553-6
  • Meinshausen, L.; Weide-Zaage, K.; Frémont, H.; Feng, W. (2010): Virtual prototyping of PoP interconnections regarding electrically activated mechanismsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESIME.2010.5464618
    ISBN: 978-1-4244-7026-6
  • Meinshausen, L.; Weide-Zaage, K.; Frémont, H.; Feng, W. (2010): PoP: Prototyping by determination of matter transport effectCPMT Symposium Japan (Formerly VLSI Packaging Workshop of Japan)
    DOI: 10.1109/CPMTSYMPJ.2010.5679664
    ISBN: 978-1-4244-7593-3
  • Mozgova, I.; Brückner, H.-P.; Bach, F.-W.; Blume, H.; Hassel, T.; Kussike, S.-M.; Bierbaum, M.; Brüggeman, P.; Piszczek, M. (2010): Development of a Therapeutic Device Supporting Real-Time Dynamic Vertical Force UnloadInternationales Wissenschaftliches Kolloquium (IWK), Ilmenau, Germany, Univ.-Prof. Dr. rer. nat. habil. Dr. h. c. Prof. h. c. Peter Scharff, Verlag ISLE (468-479) Weitere Informationen
    ISBN: 978-3-938843-53-6
  • Ohlendorf, O.; Olbrich, M.; Barke, E. (2010): Integriertes Einfügen von Repeatern während der PlatzierungedaWorkshop10, VDE-Verlag
    ISBN: 978-3-8007-3252-4
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Banz, C.; Giesemann, F.; Pirsch, P.; Blume, H. (2010): VLIW Architecture Optimization for an Efficient Computation of Stereoscopic Video ApplicationsThe 2010 International Conference on Green Circuits and Systems, IEEE (457-462)
    ISBN: 978-1-4244-6877-5
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Blume, H.; Pirsch, P. (2010): A Forwarding-sensitive Instruction Scheduling Approach to Reduce Register File Constraints in VLIW ArchitecturesApplication-specific Systems, Architectures and Processors, 2010. ASAP 2010. 21th IEEE International Conference on, François Charot, Frank Hannig, Jürgen Teich, and Christophe Wolinski, IEEE (151-158)
    ISBN: 978-1-4244-6965-9
  • Rabe, H.; Denicke, E.; Zietz, C.; Armbrecht, G.; Rolfes, I. (2010): An Imaging Radar Concept for Reliable Level Gauging8th European Conference on Synthetic Aperture Radar (EUSAR 2010), Aachen, Germany, June 7-10, 2010, pp. 935-938
  • Rabe, H.; Denicke, E.; Zietz, C.; Armbrecht, G.; Rolfes, I. (2010): A Multistatic Radar Concept for Increased Robustness in Level Measurements4th European Conference on Antennas and Propagation (EuCAP 2010), Barcelona, Spain, April 12-16, 2010
  • Schupfer, F.; Kärgel, M.; Grimm, C.; Olbrich, M.; Barke, E. (2010): Towards Abstract Analysis Techniques for Range Based System SimulationsFDL 2-1, (6)
    DOI: 10.1049/ic.2010.0146
  • Septinus, K.; Mayer, U.; Pirsch, P.; Blume, H. (2010): A Fully Programmable FSM-based Processing Engine for Gigabytes/s Header Parsing2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IEEE (45-54)
    ISBN: 978-1-4244-7937-5
  • Weide-Zaage, K. (2010): Exemplified calculation of stress migration in a 90nm node via structureIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), Keynote
    DOI: 10.1109/ESIME.2010.5464542
    ISBN: 978-1-4244-7026-6
  • Weide-Zaage, K.; Ciptokusumo, J., Aubel, O. (2010): Influence of the Activation Energy of the Different Migration Effects on Failure locations in MetallizationsAIP Conf. Proc. 1300, 85 (2010)
    DOI: 10.1063/1.3527141
  • Weide-Zaage, K.; Frémont, H.; Meinshausen, L.; Feng, W. (2010): Characterisation of thermal-electrical and mechanical behaviour of PoPSurface Mount Technology Association (SMTA), International
  • Zaum, D.; Hölldampf, S.; Neumann, I.; Olbrich, M.; Barke, E. (2010): An Accelerated Mixed-Signal Simulation Kernel for SystemCForum on Specification & Design Languages 2010 (FDL)
    DOI: 10.1049/ic.2010.0158
  • Zaum, D.; Hölldampf, S.; Neumann, I.; Olbrich, M.; Barke, E. (2010): SystemC Mixed-Signal and Mixed-Level Simulation using an Accelerated Analog Simulation ApproachThe International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design 2010 (SM2ACD)
    DOI: 10.1109/SM2ACD.2010.5672303
  • Armbrecht, G.; Denicke, E.; Pohl, N.; Musch, T.; Rolfes, I. (2009): Dielectric Travelling Wave Antennas Incorporating Cylindrical Inserts with Tapered Cavities3rd European Conference on Antennas and Propagation (EuCAP 2009), Berlin, Germany, March 23-27, 2009, pp. 3090-3094
  • Armbrecht, G.; Denicke, E.; Zietz, C.; Pohl, N.; Musch, T.; Rolfes, I. (2009): Advances in Industrial Radar Level MeasurementsElectrical and Electronic Engineering for Communication (EEEfCOM 2009), Ulm, Germany, June 24-25, 2009
  • Armbrecht, G.; Zietz, C.; Denicke, E.; Rolfes, I. (2009): A Flexible System Simulator for Antenna Performance Evaluation of Radar Level Measurements6th European Radar Conference (EuRAD 2009), Rome, Italy, September 30 - October 2, 2009, pp. 513-516
  • Armbrecht, G.; Zietz, C.; Denicke, E.; Rolfes, I. (2009): Hybrid Eigenmode Analysis of Dielectric Waveguides for the Design of Travelling Wave Endfire AntennasCST – 4th European User Group Meeting (EUGM 2009), Darmstadt, Germany, March 16-18, 2009
  • Banz, C.; Flatt, H.; Blume, H.; Pirsch, P. (2009): Hardware-Architektur zur echtzeitfähigen Berechnung dichter DisparitätskartenITG Fachtagung für Elektronische Medien "Systeme, Technologien, Anwendungen" 13. Dortmunder Fernsehseminar, VDE
  • Blume, H. (2009): Hardware-Plattformen für die Multimedia-Signalverarbeitung –Architekturkonzepte, Entwurfsmethoden, TrendsITG-Fachtagung für elektronische Medien "Systeme, Technologien, Anwendungen", 13. Dortmunder Fernsehseminar
  • Denicke, E.; Armbrecht, G.; Rolfes, I. (2009): Accurate radar distance measurements in dispersive circular waveguides considering multimode propagation effects31st Annual AMTA Symposium (AMTA 2009), Salt Lake City, Utah, November 1-6, 2009, Student Paper Award (3rd place)
  • Denicke, E.; Armbrecht, G.; Rolfes, I. (2009): A Correlation-Based Method for Precise Radar Distance Measurements in Dispersive Waveguides6th European Radar Conference (EuRAD 2009), Rome, Italy, September 30 - October 2, 2009, pp. 302-305
  • Dolar, C.; Lebowsky, F. (2009): A multiprimary display model combined with a spatio-temporal behavioral display model for display characterization by simulationProc. SPIE, 7241(724108)
  • Dolar, C.; Richter, M.; Schröder, H. (2009): Total Variation Regularization for Video Signal Processing ApplicationsITG Fachbericht, 13. Dortmunder Fernsehseminar
  • Dolar, C.; Richter, M.; Schröder, H. (2009): Total Variation Regularization Filtering for Video Signal Processing13th Int. Symp. on Consumer Electronics
  • Dolar, C.; Richter, M.; Schröder, H.; Erdler, O.; Sartor, P. (2009): Motion Blur Reduction by Pre-Emphasis with Motion Adaptive Synthetic Detail SignalsIEEE Int. Conf. on Consumer Electronics 2009
  • Feng, W.; Weide-Zaage, K.; Verdier, F.; Plano, B.; Guedon-Gracia, A.; Fremont, H. (2009): Electrically driven matter transport effects in PoP interconnectionsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESIME.2009.4938457
    ISBN: 978-1-4244-4160-0
  • Flatt, H.; Blume, S.; Tarnowsky, A.; Blume, H.; Pirsch, P. (2009): Echtzeitfähige Abbildung eines videobasierten Objekterkennungsalgorithmus auf eine modulare Coprozessor-ArchitekturITG Fachtagung für Elektronische Medien "Systeme, Technologien, Anwendungen" 13. Dortmunder Fernsehseminar, VDE
  • Flatt, H.; Schmädecke, I.; Kärgel, M.; Blume, H.; Pirsch, P. (2009): Hardware-Based Synchronization Framework for Heterogeneous RISC/Coprocessor ArchitecturesInternational Symposium on Systems, Architectures, Modeling, and Simulation, SAMOS, IEEE (125-132)
    DOI: 10.1109/ICSAMOS.2009.5289223
  • Harizi, H.; Barke, E. (2009): Chip-Level Analysis of Power Distribution NetworksIEEE Regional Symposium on Micro and Nano Electronics (IEEE-RSM2009), (440-446)
  • Harizi, H.; Fischer, H.; Olbrich, M.; Barke, E. (2009): Efficient and Fast Analysis of Power Distribution NetworksIEEE Symposium on Industrial Electronics & Applications (IEEE ISIEA 2009), (425-430)
    DOI: 10.1109/ISIEA.2009.5356442
  • Harizi, H.; Olbrich, M.; Barke, E. (2009): Modeling and Simulation Techniques for Voltage Drop due to Multiple Input Switching TransitionsInternational Conference on Computer and Electrical Engineering (ICCEE 2009), (546-550)
    DOI: 10.1109/ICCEE.2009.242
  • Herzer, S.; Kulkarni, S.; Jankowski, M.; Neidhardt, J.; Wicht, B. (2009): Capacitive-coupled current sensing and Auto-ranging slope compensation for current mode SMPS with wide supply and frequency range2009 Proceedings of ESSCIRC
    DOI: 00 10.1109/ESSCIRC.2009.5326034
  • Hinrichs, H.; Hassine, A..; Barke, E. (2009): Adrenalin - Simulating Chip Design ProcessesUniversity Booth at DATE '09
  • Hinrichs, H.; Olbrich, M.; Barke, E. (2009): An Approach for Analyzing and Evaluating Semiconductor Design ProjectsInternational Conference on Systems Engineering and Engineering Management (ICSEEM'09)
  • Jambor, T.; Zaum, D.; Olbrich, M.; Rottke, A. (2009): Combating Skill Shortage in Electrical Engineering: An Action-Oriented Teaching Unit on MicroelectronicsEngineering Education and Educational Technologies, Engineering Education and Educational Technologies(II)
  • Lebowsky, F.; Dolar, C. (2009): Using a model to quantify delicate visual artifacts of display devicesITG Fachbericht, 13. Dortmunder Fernsehseminar
  • Nolte, N.; Moch, S.; Kock, M.; Pirsch, P. (2009): Memory efficient programmable processor for bitstream processing and entropy decoding of multiple-standard high-bitrate HDTV video bitstreamsAnnual IEEE International SoC Conference, SoCC 2009, Belfast, Northern Ireland, UK, Proceedings, (427-431)
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Giesemann, F.; Blume, H.; Pirsch, P. (2009): Instruction Merging to Increase Parallelism in VLIW ArchitecturesInternational Symposium on System-on-Chip 2009, Intl. Symposium on System-on-Chip, J. Nurmi, J. Takala, O. Vainio, IEEE (143-146)
    DOI: 10.1109/SOCC.2009.5335660
    ISBN: 978-1-4244-4465-6
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Moch, S.; Pirsch, P. (2009): An Enhanced DMA Controller in SIMD Processors for Video ApplicationsArchitecture of Computing Systems - ARCS 2009, Lecture Notes in Computer Science(Vol. 5455/2009), Berekovic et al., Springer Berlin / Heidelberg (159-170)
    DOI: 10.1007/978-3-642-00454-4_17
    ISBN: 978-3-642-00453-7
  • Rabe, H.; Denicke, E.; Rolfes, I. (2009): Ein multistatisches Radarkonzept für die robuste Messung von FüllständenU.R.S.I. Kleinheubacher Tagung 2009, Miltenberg, Germany, September 28 - October 1, 2009
  • Richter, M.; Dolar, C.; Schröder, H. (2009): Zeitliche Verarbeitungsstrategien zur Reduktion von CodierartefaktenITG Fachbericht, 13. Dortmunder Fernsehseminar
  • Richter, M.; Dolar, C.; Schröder, H. (2009): Coding Artifact Reduction by Temporal Filtering13th Int. Symp. on Consumer Electronics
  • Schmädecke, I.; Dürre, J.; Blume, H. (2009): Exploration of Audio Features for Music Genre ClassificationProgram for Research on Integrated Systems and Circuits (ProRISC), Veldhoven, Netherlands, (279-284)
  • Septinus, K.; Nowosielski, R.; Pirsch, P.; Blume, H. (2009): Simulation and Modeling of I/O Protocol Processing with Application of Network Interface Design ExplorationProRISC 2009. 20th Annual Workshop on Circuits, Systems and Signal Processing, (515-521)
  • Wang, L.; Olbrich, M.; Barke, E.; Büchner, T.; Bühler, M. (2009): Fast Dynamic Power Estimation Considering Glitch FilteringIEEE International SOC Conference (SOCC 2009), (361-364)
    DOI: 10.1109/SOCCON.2009.5398019
  • Zaum, D.; Hoelldampf, S.; Neumann, I.; Schmidt, S.; Olbrich, M.; Barke, E. (2009): The Praise Approach For Accelerated Transient Analysis Applied To Wire ModelsInternational Behavioral Modeling and Simulation Conference (BMAS)
    DOI: 10.1109/BMAS.2009.5338876
  • Zietz, C.; Armbrecht, G.; Denicke, E.; Rolfes, I. (2009): Systematische Untersuchungen zum Einfluss von Antennenparametern auf die Genauigkeit in der industriellen RadarfüllstandsmesstechnikU.R.S.I. Kleinheubacher Tagung 2009, Miltenberg, Germany, September 28 - October 1, 2009
  • Armbrecht, G.; Denicke, E.; Pohl, N.; Musch, T.; Rolfes, I. (2008): Compact Directional UWB Antenna with Dielectric Insert for Radar Distance MeasurementsIEEE International Conference on Ultra-Wideband 2008 (ICUWB 2008), Hannover, Germany, September 10-12, 2008, pp. 229-232
  • Armbrecht, G.; Denicke, E.; Pohl, N.; Musch, T.; Rolfes, I. (2008): Obstacle Based Concept for Compact Mode-Preserving Waveguide Transitions for High-Precision Radar Level Measurements38th European Microwave Conference (EuMC), Amsterdam, The Netherlands, October 28-30, 2008, pp. 472-475
  • Armbrecht, G.; Denicke, E.; Rabe, H.; Pohl, N.; Musch, T.; Rolfes, I. (2008): Dielectric antenna design and its impact on radar distance measurement accuracyKleinheubacher Tagung 2008, U.R.S.I. Landesausschuss in der Bundesrepublik Deutschland e.V., Miltenberg, Germany, 22.-25. Sept. 2008
  • Aubel, O.; Thierbach, S.; Seidel, R.; Freudenberg, B.; Meyer, M.A.; Feustel, F.; Poppe, J.; Nopper, M.; Preusse, A.; Zistl, C.; Weide-Zaage, K. (2008): Comprehensive reliability analysis of CoWP Metal Cap unit processes for high volume production in sub-µm dimensionsIEEE International Reliability Physics Symposium (IRPS), Pages 675-676
    DOI: 10.1109/RELPHY.2008.4558983
    ISBN: 978-1-4244-2049-0
  • Blume, H.; Haller, M.; Botteck, M.; Theimer, W. (2008): Perceptual Feature based Music Classification A DSP Perspective for a New Type of ApplicationProceedings of the SAMOS VIII Conference (IC-SAMOS), (92-99)
  • Denicke, E.; Armbrecht, G.; Rabe, H.; Musch, T.; Rolfes, I. (2008): On precise radar distance measurements in overmoded circular waveguidesKleinheubacher Tagung 2008, U.R.S.I. Landesausschuss in der Bundesrepublik Deutschland e.V., Miltenberg, Germany, 22.-25. Sept. 2008
  • Dolar, C.; Schröder, H. (2008): Modeling Perceived LCD Moving Image RepresentationIS&T/SPIE Electronic Imaging, Color Imaging XIII, 6807
  • Flatt, H.; Blume, S.; Hesselbarth, S.; Schünemann, T.; Pirsch, P. (2008): A Parallel Hardware Architecture for Connected Component Labeling Based on Fast Label MergingInternational Conference on Application-specific Systems, Architectures and Processors, ASAP, IEEE
    DOI: 10.1109/ASAP.2008.4580169
    ISBN: 978-1-4244-1897-8
  • Freisfeld, M.; Olbrich, M.; Barke, E. (2008): Circuit Simulations with Uncertainties using Affine Arithmetic and Piecewise Affine StatemodelsProceedings of International Conference on Solid-State and Integrated-Circuit Technology, IEEE Press
    ISBN: 978-1-4244-2186-2
  • Freisfeld, M.; Olbrich, M.; Pfost, M.; Barke, E. (2008): Verlässliche Modellierung integrierter analoger Schaltungen durch stückweise affine Abbildungen10. GMM/ITG-Fachtagung Analog 2-1, (56), VDE/VDI-Gesellschaft, VDE Verlag GmbH
  • Grabowski, D.; Olbrich, M.; Barke, E. (2008): AC-Analyse analoger Schaltungen mit affiner ArithmetikAnalog 2-1, Entwicklung von Analogschaltungen mit CAE-Methoden, GMM/ITG, VDE (63-68)
    ISBN: 978-3-8007-3083-4
  • Grabowski, D.; Olbrich, M.; Barke, E. (2008): Analog Circuit Simulation Using Range ArithmeticsProceedings of the ASP-DAC 2-1, (762-767)
    ISBN: 978-1-4244-1921-0
  • Grabowski, D.; Olbrich, M.; Barke, E. (2008): Simulation analoger Schaltungen mit affiner Arithmetik2. GMM/GI/ITG-Fachtagung "Zuverlässigkeit und Entwurf", VDE Verlag
  • Hassine, A.; Barke, E. (2008): On Modeling and Simulating Chip Design Processes: The RS ModelIEEE International Engineering Management Conference - Europe, (81-85)
  • Hassine, A.; Barke, E. (2008): Towards Simulation of Chip Design Processes: The Request Service ModelIASTED International Conference on Modelling and Simulation, Quebec, Canada, (193-198)
  • Hinrichs, H.; Barke, E. (2008): Applying Performance Management on Semiconductor Design ProcessesIEEE International Conference on Industrial Engineering and Engineering Management, 2008. IEEM 2008., (278 - 281)
  • Hölldampf, S.; Zaum, D.; Neumann, I.; Schmidt, S.; Olbrich, M.; Barke, E. (2008): Methodologies for high-level modelling and evaluation in the automotive domainForum on Specification, Verification and Design Languages, 2008 (FDL 2008)
  • Jambor, T.; Zaum, D.; Olbrich, M.; Barke, E. (2008): A Trapezoidal Approach to Corner Stitching Data Structures for Arbitrary Routing AnglesIEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, (54-58)
  • Livonius, v.; Blume, H.; Noll, G. (2008): Design of a Pareto-Optimization Environment ant its Application to Motion EstimationProceedings of the International Workshop on Multimedia Signal Processing (MMSP 2008)
  • Neuenhahn, M.; Schleifer, J.; Blume, H.; Noll, G. (2008): Comparison of Performance Analysis Techniques for Modular and Generic Network-on-ChipTagungsband der URSI Kleinheubacher Tagung 2008
  • Neumann, B.; Sydow, v.; Blume, H.; Noll, G. (2008): Design flow for embedded FPGAs based on a flexible architecture templateProceedings of the DATE 2008
  • Ohlendorf, O.; Steinhorst, S.; Hartong, W.; Hedrich, L. (2008): Comparing Two Analog Waveforms - A Trivial Task?2. GMM/GI/ITG-Fachtagung "Zuverlässigkeit und Entwurf", VDE Verlag
  • Olbrich, M.; Barke, E. (2008): Distribution Arithmetic for Stochastical AnalysisProceedings of the ASP-DAC 2-1, (537-542)
  • P. Panitz, M. Olbrich, E. Barke, M. Bühler, J. Koehl (2008): Redundanz in Repeaternetzwerken auf ULSI-Chips zur Erhöhung der funktionalen und parametrischen Ausbeute2. GMM/GI/ITG-Fachtagung "Zuverlässigkeit und Entwurf", VDE Verlag (8)
    ISBN: 978-3-8007-3119-0
  • Panitz, P.; Olbrich, M.; Barke, E.; Buehler, M.; Koehl, J. (2008): Considering Possible Opens in Wire Delay Calculation for Non-tree TopologiesACM Great Lakes Symposium on VLSI Proceedings, ACM Great Lakes Symposium on VLSI Proceedings, Association for Computing Machinery, (17-22)
    ISBN: 978-1-59593-999-9
  • Rabe, H.; Denicke, E.; Armbrecht, G.; Musch, T.; Rolfes, I. (2008): Considerations on radar localization in multi-target environmentsKleinheubacher Tagung 2008, U.R.S.I. Landesausschuss in der Bundesrepublik Deutschland e.V., Miltenberg, Germany, 22.-25. Sept. 2008
  • Richter, M.; Dolar, C.; Lenke, S.; Schröder, H.; Erdler, O.; Sartor, P. (2008): Bildinhaltsabhängiges Verfahren zur Reduktion von Bewegungsunschärfe für Hold-type DisplaysFKTG Jahrestagung 2008
  • Schleifer, J.; Blume, H.; Noll, G. (2008): Performance Analysis of Networks on Chip Using Coloured Petri NetsProceedings of the ProRISC Workshop
  • Septinus, K.; Mayer, U.; Starke, W.; Pirsch, P. (2008): Design of a (B)FSM-based Processing EngineCOOL Chips XI, International Symposium on Low-Power and High-Speed Chips, (132)
  • Sydow, v.; Blume, H.; Kappen, G.; Noll, G. (2008): ASIP-eFPGA architecture for multioperable GNSS receiversProceedings of the SAMOS VIII Workshop (WS-SAMOS), 5114, (136-145)
  • Weide-Zaage, K.; Fremont, H.; Wang, L. (2008): Simulation of Migration Effects in PoPIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESIME.2008.4525074
    ISBN: 978-1-4244-2127-5
  • Wendt, M.; Thoma, L.; Wicht, B.; Schmitt-Landsiedel, D.; (2008): A Configurable High-Side/Low-Side Driver With Fast and Equalized Switching DelayIEEE Journal of Solid-State Circuits ( Volume: 43 , Issue: 7 , July 2008 )
    DOI: 10.1109/JSSC.2008.923734
  • Zaum, D.; Olbrich, M.; Barke, E. (2008): Automatic data extraction: A prerequisite for productivity measurementEngineering Management Conference, 2008 (IEMC Europe 2008)
  • Armbrecht, G.; Denicke, E.; Rolfes, I.; Pohl, N.; Musch, T.; Schiek, B. (2007): Compact mode-matched excitation structures for radar distance measurements in overmoded circular waveguidesKleinheubacher Tagung 2007, U.R.S.I. Landesausschuss in der Bundesrepublik Deutschland e.V., Miltenberg, Germany, 24.-27. Sept. 2007
  • Blume, H.; Livonius, v.; Rotenberg, L.; Bothe, H.; Brakensiek, J.; Noll, G. (2007): Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor PlatformProceedings of the SAMOS VII Conference, (74-81)
  • Botteck, M.; Blume, H.; Livonius, v.; Neuenhahn, M.; Noll, G. (2007): Programmable Architectures for Realtime Music DecompressionProceedings of the ParaFPGA 2007
  • Flügel, S.; Klußmann, H.; Pirsch, P.; Schulz, M.; Cisse, M.; Gehrke, W. (2007): A highly parallel sub-pel accurate motion estimator for H.264IEEE 2006 International Workshop on Multimedia Signal Processing (MMSP-06)
  • Freisfeld, M.; Olbrich, M.; Grimm, C.; Barke, E. (2007): Verwendung von Gebietsarithmetiken zum Entwurf robuster Schaltungen und Systeme1.GMM/GI/GI-Fachtagung Zuverlaessigkeit und Entwurf, VDE Verlag, Berlin (131-136)
    ISBN: 9783800730230
  • Grabowski, D.; Olbrich, M.; Grimm, C.; Barke, E. (2007): Range Arithmetics to Speed up Reachability Analysis of Analog SystemsFDL 2-1, (CD-ROM)
  • Harizi, H.; Häußler, R.; Olbrich, M.; Barke, E. (2007): Efficient modeling techniques for dynamic voltage drop analysisProceedings of the 44th annual Design Automation Conference (DAC) 2-1, (706-711)
    ISBN: 978-1-59593-627-1
  • Häusler, S.; Poppen, F.; Preis, S.; Hausmann, K.; Nebel, W.; Hahn, A.; Leppelt, P.; Hassine, A.; Barke, E.) (2007): Modellierung von Komplexität und Qualität als Faktoren von Produktivität in Design-Flows für integrierte Schaltungen
  • Hinrichs, N.; Leppelt, P.; Barke, E. (2007): Building up a Performance Measurement System to Determine Productivity Metrics of Semiconductor Design ProjectsIEEE International Engineering Management Conference (IEMC), Austin Texas, IEEE, IEEE (CD-ROM Proceedings)
    ISBN: 978-1-4244-2146-6
  • Jambor, T.; Olbrich, M.; Barke, E. (2007): Corner-Stitching-Datenstruktur für beliebige LayoutstrukturenEDA Workshop 2-1, VDE (41 - 46)
    ISBN: 9783800730384
  • Jeschke, H. (2007): Efficiency Measures for Multimedia SOCsProceedings of SAMOS VII Workshop, 2007, Springer (190-199)
    ISBN: 3540736255
  • Livonius, v.; Blume, H.; Noll, G. (2007): Flexible Umgebung zur Pareto-Optimierung von Algorithmen - Anwendungen in der VideosignalverarbeitungTagungsband der ITG-Fachtagung Elektronische Medien, 199, (157-162)
  • Nolte, N.; Gehrke, W.; Wiczinowski, F.; Pirsch, P. (2007): SCALABLE MULTI-STANDARD LSI TEXTURE ENCODER FOR MPEG AND VC-1 VIDEO COMPRESSIONMultimedia and Expo, 2007 IEEE International Conference on, (1187-1190)
    DOI: 10.1109/ICME.2007.4284868
    ISBN: 1-4244-1016-9
  • Ohlendorf, O.; Olbrich, M.; Barke, E. (2007): Timing-Driven-3D-Platzierung mit einem kräftebasierten Ansatz1.GMM/GI/GI-Fachtagung Zuverlaessigkeit und Entwurf, VDE Verlag GmbH, Berlin (187-188)
    ISBN: 9783800730230
  • Panitz, P.; Olbrich, M.; Barke, E.; Koehl, J. (2007): Robust Wiring Networks for DfY Considering Timing ConstraintsGreat Lakes Symposium on VLSI 2-1, ACM, New York (43-48)
    ISBN: 9781595936059
  • Panitz, P.; Quiring, A.; Mueller, H.-C.; Olbrich, M.; Barke, E.; Koehl, J. (2007): Erhoehung der Ausbeute durch robuste Verdrahtungsnetzwerke1.GMM/GI/GI-Fachtagung Zuverlaessigkeit und Entwurf, VDE Verlag GmbH - Berlin, Offenbach (117-123)
    ISBN: 9783800730230
  • Payá-Vayá, G.; Jambor, T.; Septinus, K.; Hesselbarth, S.; Flatt, H.; Freisfeld, M.; Pirsch, P. (2007): CHIPDESIGN - From Theory to Real WorldProceedings of the Workshop on Computer Architecture Education in conjunction with the 34th International Symposium on Computer Architecture, ACM (58-64) Weitere Informationen
    ISBN: 978-1-59593-797-1
  • Payá-Vayá, G.; Langerwerf, M.; Pirsch, P. (2007): Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized SchedulerARCS 2007, LNCS 4415, Springer-Verlag, Berlin Heidelberg (254-267)
    DOI: 10.1007/978-3-540-71270-1_19
    ISBN: 3540712674
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Pirsch, P. (2007): RAPANUI: A case study in Rapid Prototyping for Multiprocessor System-on-Chip10th EUROMICRO Conference on Digital System Design (DSD 2007): Architectures, Methods and Tools, IEEE Conference Publishing Services, Los Alamitos (California, USA) (215-221)
    DOI: 10.1109/DSD.2007.4341471
    ISBN: 9780769529783
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Taptimthong, P.; Pirsch, P. (2007): Design Space Exploration of Media Processors: A Parameterized SchedulerProceedings of the Intl. Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2007), IEEE (41-49)
    DOI: 10.1109/ICSAMOS.2007.4285732
    ISBN: 1424410584
  • Septinus, K.; Le, T.; Mayer, U.; Pirsch, P. (2007): On the Design of Scalable Massively Parallel CRC CircuitsProceedings of 2007 IEEE International Conference on Electronics, Circuits and Systems, (142-145)
  • Sydow, v.; Neumann, B.; Blume, H.; Noll, G. (2007): Design and quantitative analysis of ASIPs with eFPGA-based accelerators as flexible ISA-extensionProceedings of the PhD-Forum DATE 2007 (Design, Automation and Test in Europe)
  • Weinkopf, J. T.; Harbich, K.; Barke, E. (2007): Incremental Fault Emulation17th International Conference on Field Programmable Logic and Applications, Delft University of Technology, Delft (542-545)
    ISBN: 1424410606
  • Wendt, M.; Thoma, L.; Wicht, B.; Schmitt-Landsiedel, D. (2007): A configurable High-Side/ low-Side Driver
    DOI: 10.1109/ESSCIRC.2007.4430292
  • Zhang, M.; Olbrich, M.; Seider, D.; Frerichs, M.; Kinzelbach, H.; Barke, E. (2007): Ein Verfahren zur Analyse der Prozessschwankungen für nichtlineare Schaltungen mit nicht-Gauss-verteilten Parametern1.GMM/GI/ITG-Fachtagung Zuverlaessigkeit und Entwurf, VDE VERLAG GMBH, Berlin (25-30)
    ISBN: 9783800730230
  • Zhang, M.; Olbrich, M.; Seider, D.; Frerichs, M.; Kinzelbach, H.; Barke, E. (2007): CMCal: An Accurate Analytical Approach for the Analysis of Process Variations with Non-Gaussian Parameters and Nonlinear FunctionsDesign, Automation and Test in Europe (DATE2007), IEEE Catalog Number 07EX1635 (243 - 248)
    ISBN: 9783981080124
  • Zipf, P.; Hinkelmann, H.; Deng, L.; Glesner, M.; Blume, H.; Noll, G. (2007): A Power Estimation Model for an FPGA-based Softcore ProcessorProceedings of the FPL 2007, (171-176)
  • Alain Vachoux, Christoph Grimm, Ralf Kakerow, Christian Meise (2006): Embedded Mixed-Signal Systems: New Challenges for Modeling and SimulationISCAS 2-1, IEEE Press (CD-ROM)
  • Blume, H.; Becker, D.; Botteck, M.; Brakensiek, J.; Noll, G. (2006): Hybrid Functional and Instruction Level Power Modeling for Embedded ProcessorsProceedings of the SAMOS VI Conference, 4017, (216-226)
  • D. Grabowski, C. Grimm, E. Barke (2006): Semi-Symbolic Modeling and Simulation of Circuits and SystemsIEEE International Symposium on Circuits and Systems (ISCAS 2006), IEEE, Kos (CD-ROM)
    ISBN: 0-7803-9390-2
  • D. Grabowski, C. Grimm, E. Barke (2006): Ein Verfahren zur effizienten Analyse von Schaltungen mit Parametervarianzen9. Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Fraunhofer IIS (181-190)
    ISBN: 3-9810287-1-6
  • Dolar, C. (2006): Auswirkungen der zeitlich-örtlichen LC Display-Auflösung auf die Qualität der BewegtbildwiedergabeFKTG-Jahrestagung 2006
  • Frémont, H.; Horaud, W.; Weide-Zaage, K. (2006): Measurements and FE-Simulations of Moisture Distribution in FR4 based Printed Circuit BoardsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
    DOI: 10.1109/ESIME.2006.1643964
    ISBN: 1-4244-0275-1
  • Hassine, A.; Olbrich, M.; Barke, E. (2006): Computer Aided HRM for the Semiconductor Industry: Computer Aided HRM for the Semiconductor Industry: Limits and Perspectives7th Asia Pacific Industrial Engineering and Management Systems Conference (APIEMS 2006), (CD_ROM)
  • Jambor, T.; Olbrich, M.; Barke, E.; Köhne, J. (2006): RL-Analysis of Meander Shaped Adjustment Modules10th IEEE Workshop on Signal Propagation on Interconnects
  • Jeschke, H. (2006): Chip Size Estimation for SOC Design Space ExplorationIEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), (56-62)
  • Kupzog, F.; McLaughlin, K.; Sezer, S.; Blume, H.; Noll, T.; McCanny, J. (2006): Design and Analysis of Matching Circuit Architectures for a Closest Match LookupProceedings of the Advanced International Conference on Telecommunications (IEEE-AICT'06), (224-229)
  • Leppelt, P.; Hassine, A.; Barke, E. (2006): An Approach to Make Semiconductor Design Projects Comparable7th Asia Pacific Industrial Engineering and Management Systems Conference (APIEMS 2006), Asian Institute of Technology (CD-ROM)
    ISBN: 974-8257-26-6
  • McLaughlin, K.; Kupzog, F.; Blume, H.; Sezer, S.; Noll, G.; McCanny, J. (2006): Design and analysis of matching circuit architectures for a closest match lookupProceedings of the 20th International Parallel and Distributed Processing Symposium 2006 (IPDPS 2006)
  • McLaughlin, K.; Sezer, S.; Blume, H.; Yang, X.; Kupzog, F.; Noll, G. (2006): A Scalable Packet Sorting Circuit for High-Speed WFQ Packet SchedulingProceedings of the IEEE SOC Conference 2006, (271-274)
  • Neuenhahn, M.; Blume, H.; Noll, G. (2006): Quantitative analysis of network topologies for NoC-architectures on an FPGA-based emulatorProceedings of the URSI "Advances in Radio Science - Kleinheubacher Berichte''
  • Ohlendorf, O.; Olbrich, M.; Barke, E. (2006): Global Routing for Force Directed PlacementProceedings 10th IEEE Workshop on Signal Propagation on Interconnects (SPI06), IEEE (25-29)
    ISBN: 1424404541
  • Panitz, P.; M. Olbrich, E. Barke, J. Koehl (2006): Global Loops on ULSI Routing for DfYICICDT 2006 Proceedings, Padova, IEEE (179-182)
    ISBN: 1424400988
  • R. Klausen, L. Hedrich, E. Barke (2006): Vermeidung fehlerhafter Verifikations-Ergebnisse beim Äquivalenz-Vergleich nichtlinearer analoger Schaltungen9. Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), saxOprint, Dresden (122-131)
    ISBN: 3981028716
  • Simon-Klar, C.; Nolte, N.; Langemeyer, S.; Pirsch, P. (2006): Image Data Rate Reduction for an On-Board Real-Time SAR-ProcessorProceedings of EUSAR 2006, VDE-Verlag GmbH, Berlin, Offenbach (CDROM)
    ISBN: 3800729601
  • Sydow, v.; Korb, M.; Neumann, B.; Blume, H.; Noll, G. (2006): Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA MacrosProceedings of the ReConFig'06 Conference, (252-261)
  • Sydow, v.; Neumann, B.; Blume, H.; Noll, G. (2006): Quantitative Analysis of embedded FPGA Architectures for ArithmeticProceedings of the Application Specific Systems, Architectures and Processors Conference 2006 (ASAP 2006), (125-131)
  • Weinkopf, J. T.; Harbich, K.; Barke, E. (2006): PARSIFAL: A Generic and Configurable Fault Emulation Environment with Non-Classical Fault Models16th International Conference on Field Programmable Logic and Applications, Publidisa, Madrid (241-246)
    ISBN: 142440312X
  • Zhang, M.; Olbrich, M.; Kinzelbach, H.; Seider, D.; Barke, E. (2006): A Fast and Accurate Monte Carlo Method for Interconnect VariationICICDT 2006 Proceedings, (207-210)
  • A. Vachoux, Ch. Grimm, K. Einwich (2005): Extending SystemC to support Mixed Discrete-Continuous System Modeling and SimulationIEEE Symposium on Circuits and Systems 2-1, IEEE Press, IEEE Press
  • Amir Hassine, Erich Barke (2005): An Automated Approach to Measure Design Productivity Based on Quality Metrics in a Semiconductor Design ProcessAsia Pacific Industrial Engineering and Management Society Conference, Manila (Philippines), (CD-ROM)
  • Amir Hassine, Erich Barke (2005): Measure your Design Value to Improve ItIEEE International Engineering Management Conference. St. John's, Newfoundland, Kanada CD-ROM, Proceedings of 2005 IEEE International Engineering Management Conference, Newfoundland & Labrador, Canada.
    ISBN: 0780391403
  • Blume, H.; Sydow, v.; Becker, D.; Noll, G. (2005): Modeling NoC Architectures by Means of Deterministic and Stochastic Petri NetsProceedings of the SAMOS V Conference, 3553, (374-383)
  • D. Grabowski, D. Platte, L. Hedrich, E. Barke (2005): Time Constrained Verification of Analog Circuits using Model-Checking AlgorithmsENTCS, ETAPS 2005
  • D. Platte, D. Grabowski, L. Hedrich, E. Barke (2005): Verifikation von Zeitbedingungen analoger Schaltungen durch Model-Checking-VerfahrenAnalog 2005: 8. ITG/GMM-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (159-164)
  • Dehnhardt, A.; Kulaczewski, B.; Friebe, L.; Moch, S.; Stolberg, -.; Reuter, C. (2005): A Multi-Core SoC Design for Advanced Image and Video CompressionProceedings of 2005 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2005)
  • Dolar, C.; Kohlmeyer, G.; Lenke, S.; Piastowski, P.; Schröder, H. (2005): Entwicklungstrends der digitalen VideosignalverarbeitungITG/FKTG Fachtagung Elektronische Medien, 11. Dortmunder Fernsehseminar
  • Jambor, T.; Schreiner, L.; Olbrich, M.; Barke, E. (2005): Net order optimization in analog net bundlesMicrotechnologies for New Millenium 2005
  • Joerg Oehmen, Lars Hedrich, Markus Olbrich, Erich Barke (2005): A Methodology for Modeling Lateral Parasitic Transistors in Smart Power ICs 2005 IEEE International Behavioral Modeling and Simulation Conference, IEEE (19-24)
    ISBN: 078039352x
  • Langemeyer, S.; Simon-Klar, C.; Nolte, N.; Pirsch, P. (2005): Architecture of a Flexible On-Board Real-Time SAR-ProcessorIGARSS 2005, IEEE (CD-ROM)
    ISBN: 0780390512
  • Livonius, v.; Blume, H.; Noll, G. (2005): FLPA-based power modeling and power aware code optimization for a Trimedia DSPProceedings of the ProRISC-Workshop
  • Livonius, v.; Blume, H.; Noll, G. (2005): Verwendung von Meta-Bildinformationen zur hochqualitativen BewegungsschätzungTagungsband der ITG-Fachtagung Elektronische Medien (11. Dortmunder Fernsehseminar), (175-180)
  • Müller, S.; Zaum, D. (2005): Robust Building Detection in Aerial ImagesProc. Joint Workshop of ISPRS and DAGM: CMRT05, (3), (143-148)
  • Neumann, B.; Sydow, v.; Blume, H.; Noll, G. (2005): Entwurf und quantitative Analyse parametrisierbarer eFPGA-Architekturen für Arithmetik-AnwendungenProceedings of the URSI Kleinheubacher Tagung 2005
  • Oehmen, J.; Olbrich, M.; Barke, E. (2005): Modeling Substrate Currents in Smart Power ICsInt. Symp. on Power Semiconductor Devices and ICs 2005 (ISPSD05), IEEE (127-130)
    ISBN: 0-7803-8889-5
  • Pelz, Georg and Oehler, Peter and Fourgeau, Eliane and Grimm, Christoph (2005): Automotive System Engineering and AutoSARAdvances in Design and Specification Languages for SoCs, Springer
  • Philipp Panitz, Markus Olbrich, Erich Barke (2005): Detailed Routing With Integrated Static Timing Analysis Applying Simulated AnnealingProceedings of the IEEE Northeastern Workshop on Circuits and Systems, IEEE (387-390)
    ISBN: 0780389344
  • R. Klausen, L. Hedrich, E. Barke (2005): Äquivalenz-Vergleich nichtlinearer analoger MIMO-Systeme mit automatischer SchrittweitensteuerungAnalog 2005: 8. ITG/GMM-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, VDE-Verlag, Berlin (183-188)
    ISBN: 3800728818
  • Schreiner, L.; Olbrich, M.; Barke, E.; Meyer zu Bexten, V. (2005): Routing of Analog Busses with Parasitic SymmetryInternational Symposium on Physical Design, ACM Press, New York (14-19)
    ISBN: 1-59593-021-3
  • Schreiner, L.; Olbrich, M.; Barke, E.; Meyer zu Bexten, V. (2005): PARSY: PARasitenSYmmetrische Verdrahtung für analoge Busse mit ModulgeneratorenANALOG'05 (8. GMM/ITG-Diskussionssitzung), VDE Verlag GmbH, Berlin, Offenbach (283-288)
    ISBN: 3-8007-2881-8
  • Volodymyr Burkhay, Sebastian Breutmann, Lars Hedrich, Erich Barke (2005): Symbolische Analyse nichtlinearer analoger Schaltungen mit Hilfe Branch-and-Bound-optimierter VereinfachungANALOG'05 (8. GMM/ITG-Diskussionssitzung), VDE, Berlin (253-258)
    ISBN: ISBN 3800728818
  • W. Heupke, Ch. Grimm, K. Waldschmidt (2005): Semi-Symbolic Simulation of Nonlinear SystemsForum on Specification and Design Languages (FDL'05), Lausanne, September 2-1, ECSI, Gieres (CD-ROM)
  • Weide-Zaage, K.; Hein, V. (2005): Simulation of Mass Flux Divergence Distributions for an Evaluation of Commercial Test Structures with Tungsten-plugsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Pages 367-372
    DOI: 10.1109/ESIME.2005.1502827
    ISBN: 0-7803-9062-8
  • Blume, H.; Livonius, v.; Noll, G. (2004): Segmentation in the Loop - An iterative, object based algorithm for motion estimationProceedings of the Visual Communication and Image Processing 2004 (VCIP'04) Conference, (464-473)
  • Blume, H.; Noll, G. (2004): Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri NetsProceedings of the Samos'2004 Workshop, Embedded Systems, Architectures, Modeling and Simulation, 3133, (484-493)
  • Blume, H.; Schneider, M.; Noll, G. (2004): Power Estimation on a Functional Level for Programmable ProcessorsProceedings of the TI Developers Conference 2004
  • Jachalsky, J.; Wahle, M.; Pirsch, P.; Gehrke, W.; Hinz, T. (2004): A Coprocessor for Intelligent Image and Video Processing in the Automotive and Mobile Communication Domain2004 IEEE International Symposium on Consumer Electronics. Proceedings, IEEE Press, Piscataway, NJ (142-145)
    ISBN: 0780385268
  • Kaya, I.; Salewski, S.; Olbrich, M.; Barke, E. (2004): Wirelength Reduction Using 3-D Physical DesignPATMOS 2-1, (453-462)
  • Näthke, L.; Burkhay, V.; Hedrich, L.; Barke, E. (2004): Hierarchical Automatic Behavioral Model Generation of Nonlinear Analog Circuits based on Nonlinear Symbolic TechniquesProceedings Design, Automation and Test in Europe (DATE2004), IEEE Computer Society, Los Alamitos (442-447)
    ISBN: 0769520855
  • Neuenhahn, M.; Blume, H.; Noll, G. (2004): Pareto Optimal Design of an FPGA-based Real-Time Watershed Image SegmentationProceedings of the ProRISC Workshop
  • Nguyen, H.V. ; Salm, C. ; Krabbenborg, B. ; Weide-Zaage, K. ; Bisshop, J. ; Mouthaan, A.J.; Kuper, F.G. (2004): Effect of Thermal Gradients on the Electromigration Lifetime in Power ElectronicsIEEE International Reliability Physics Symposium (IRPS), 2004, pp. 619-620
    DOI: 10.1109/RELPHY.2004.1315418
    ISBN: 0-7803-8315-X
  • Nolte, N.; Simon-Klar, C.; Langemeyer, S.; Kirscht, M.; Pirsch, P. (2004): Next Generation On-Board SAR Processor for Compact Airborne SystemsIEEE International Geoscience and Remote Sensing Symposium 2004, IEEE, Piscataway (1514-1517)
    ISBN: 0780387422
  • Olbrich, M.; Barke, E. (2004): Placement Using a Localization Probability Model (LPM)Proceedings Design, Automation and Test in Europe (DATE2004), IEEE Computer Society, Los Alamitos (1412-1413)
    ISBN: 0769520855
  • Patino, M.; Peiro, M.; Ballester, F.; Payá-Vayá, G. (2004): 2D-DCT on FPGA by Polynomial Transformation in Two-DimensionsProceedings of the 2004 International Symposium on Circuits and Systems (ISCAS '04), 3, IEEE (365-368)
    ISBN: 0-7803-8251-X
  • Simon-Klar, C.; Kirscht, M.; Langemeyer, S.; Nolte, N.; Pirsch, P. (2004): An On-board Real-Time SAR Processor for Small PlatformsProceedings of SPIE Vol. 5574, Remote Sensing for Environmental Monitoring, GIS Applications, and Geology IV, SPIE, Bellingham, WA (420-427)
    ISBN: ISBN 0819455210
  • Simon-Klar, C.; Kirscht, M.; Langemeyer, S.; Nolte, N.; Pirsch, P. (2004): A Small Real-Time Processor for SAR Image GenerationProceedings EUSAR 2004 5th European Conference on Synthetic Aperture Radar, VDE Verlag GmbH, Berlin (729-732)
    ISBN: 3800728281
  • Stolberg, -.; Moch, S.; Friebe, L.; Dehnhardt, A.; Kulaczewski, B.; Berekovic, M.; Pirsch, P. (2004): An SoC with Two Multimedia DSPs and a RISC Core for Video Compression Applications2004 IEEE International Solid-State Circuits Conference Digest of Technical Papers, IEEE, Piscataway, NJ (330-331, 531)
    ISBN: 01936530
  • Weide-Zaage, K.; Dalleau, D.; Danto, Y.; Fremont, H. (2004): Void formation in a copper-via-structure depending on the stress free temperature and metallization geometryIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Pages 367-372
    DOI: 10.1109/ESIME.2004.1304065
    ISBN: 0-7803-8420-2
  • Wicht, B.; Nirschl, T.; Schmitt-Landsiedel, D. (2004): Yield and speed optimization of a latch-type voltage sense amplifierIEEE Journal of Solid-State Circuits ( Volume: 39 , Issue: 7 , July 2004 )
    DOI: 10.1109/JSSC.2004.829399
  • Berekovic, M.; Flügel, S.; Stolberg, -.; Friebe, L.; Moch, S.; Kulaczewski, B.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core Architecture for Image and Video ApplicationsProceedings ICIP2003, IEEE, Piscataway, NJ (101-104)
    ISBN: 0780377508
  • Berekovic, M.; Moch, S.; Pirsch, P. (2003): A Scalable, Clustered SMT Processor for Digital Signal ProcessingMedea Workshop (in conjunction with PACT)
  • Blume, H.; Kannengiesser, S.; Noll,, G. (2003): Image Quality Enhancement for MRT ImagesProceedings of the ProRISC Workshop
  • Blume, H.; Livonius, v.; Noll, G. (2003): Segmentation in the Loop - Ein iteratives, objektunterstütztes Verfahren zur BewegungsschätzungProceedings der ITG-Fachtagung "Elektronische Medien", (159-164)
  • Cerda, J.; Gadea, R.; Payá-Vayá, G. (2003): Implementing a Margolus Neighborhood Cellular Automata on a FPGA7th International Work-Conference on Artificial and Natural Neural Networks (IWANN'03), LNCS - Artificial Neural Nets Problem Solving Methods(2687), Springer Berlin / Heidelberg (121-128)
    DOI: 10.1007/3-540-44869-1_16
    ISBN: 978-3-540-40211-4
  • Friebe, L.; Stolberg, -.; Berekovic, M.; Moch, S.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A System-on-Chip Architecture with Two Multimedia DSPs and a RISC CoreIEEE International SOC Conference, IEEE, Piscataway, NJ (85-88)
    ISBN: 0780381823
  • Gehrke, W.; Jachalsky, J.; Wahle, M.; Kruijtzer, W.; Alba, C.; Sethuraman, R. (2003): Flexible Coprocessor Architectures for Ambient Intelligent Applications in the Mobile Communication and Automotive DomainVLSI Circuits and Systems, Proceedings of SPIE, Volume 5117, SPIE, Bellingham, WA (310-320)
    ISBN: 0819449776
  • Hermann, A.; Olbrich, M.; Barke, E. (2003): Substrate Modeling and Noise Reduction in Mixed-Signal CircuitsProc. of IFIP VLSI SoC, Darmstadt (13-18)
    ISBN: 3901882170
  • Hermann, A.; Olbrich, M.; Barke, E. (2003): Placing Substrate Contacts into Mixed-Signal Circuits Controlling Circuit PerformanceProc. Of 25th IEEE Custom Integrated Circuits Conference, (373-376)
  • Jachalsky, J.; Wahle, M.; Pirsch, P.; Capperon, S.; Gehrke, W.; Kruijtzer, M.; Nuñez, A. (2003): A Core for Ambient and Mobile Intelligent Imaging ApplicationsProceedings of the 2003 IEEE International Conference on Multimedia & Expo (ICME 2003), IEEE Press, Piscataway, NJ (CDROM)
    ISBN: 0780379667
  • Kaya, I.; Olbrich, M.; Barke, E. (2003): 3-D Placement Considering Vertical InterconnectsProceedings of the IEEE International SOC Conference, (257-258)
    ISBN: 0780381823
  • Langemeyer, S.; Kloos, H.; Simon-Klar, C.; Friebe, L.; Hinrichs, W.; Lieske, H.; Pirsch, P. (2003): A Compact and Flexible Multi-DSP System for Real-Time SAR ApplicationsProceedings IGARSS2003, IEEE (CD-ROM)
    ISBN: 0780379306
  • Lemke, A.; Hedrich, L.; Barke, E. (2003): Dimensionierung analoger Schaltungen mit formalen Methoden7. ITG/GMM-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, VDE-Verlag, Berlin (135-140)
    ISBN: 3-8007-2778-1
  • Malonnek, C.; Olbrich, M.; Barke, E. (2003): Ein neues Platzierungsverfahren für einen leitbahnzentrierten DesignflowE.I.S.-Workshop, VDE VERLAG GmbH (151-156)
    ISBN: 3800727609
  • Moch, S.; Berekovic, M.; Stolberg, -.; Friebe, L.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core Architecture for Image and Video ApplicationsProceedings MEDEA Workshop at The Twelfth International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), (57-63)
  • Neumann, B.; Blume, H.; Feldkämper, H.; Noll,, G. (2003): Embedded FPGA-Architekturen für Multimedia-ApplikationenProceedings der ITG-Fachtagung "Elektronische Medien", (147-152)
  • Neumann, B.; Feldkämper, H.; Blume, H.; Noll, G. (2003): Application Domain Specific Embedded FPGAsProceedings of the DSP Design Workshop 2003
  • Patino, M.; Peiro, M.; Ballester, F.; Payá-Vayá, G. (2003): Evaluation of 2D-DCT Architecture for FPGAXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2003), IEEE (557-561)
    ISBN: 84-87087-40-X
  • Payá-Vayá, G.; Peiro, M.; Ballester, F.; Gadea, R.; Colom, R. (2003): New Distributed Arithmetic Discrete Wavelet Packet Transform ArchitectureVLSI Circuits and Systems, SPIE International Symposium on Microtechnologies for the New Millennium, 5117, Jose F. Lopez, Juan A. Montiel-Nelson, and Dimitris Pavlidis, SPIE (370-378)
    DOI: 10.1117/12.499056
    ISBN: 0-8194-4977-6
  • Payá-Vayá, G.; Peiro, M.; Ballester, F.; Herrero, V.; Colom, R. (2003): New Lifting Folded Pipelined Discrete Wavelet Transform ArchitectureVLSI Circuits and Systems, SPIE International Symposium on Microtechnologies for the New Millennium, 5117, Jose F. Lopez, Juan A. Montiel-Nelson, and Dimitris Pavlidis, SPIE (351-360)
    DOI: 10.1117/12.499049
    ISBN: 0-8194-4977-6
  • Payá-Vayá, G.; Peiro, M.; Ballester, F.; Herrero, V.; Mora, F. (2003): Lifting Folded Pipelined Discrete Wavelet Packet Transform ArchitectureVLSI Circuits and Systems, SPIE International Symposium on Microtechnologies for the New Millennium, 5117, Jose F. Lopez, Juan A. Montiel-Nelson, and Dimitris Pavlidis, SPIE (312-328)
    DOI: 10.1117/12.498992
    ISBN: 0-8194-4977-6
  • Payá-Vayá, G.; Peiró, M.; Ballester, F.; Mora, F. (2003): Fully Parameterized Discrete Wavelet Packet Transform Architecture Oriented to FPGA13th International Conference on Field Programmable Logic and Application (FPL 2003), LNCS 2778, Springer Berlin / Heidelberg (533-542)
    DOI: 10.1007/978-3-540-45234-8_52
    ISBN: 978-3-540-40822-2
  • Payá-Vayá, G.; Peiro, M.; Ballester, J.; Cerda, J. (2003): A New Inverse Discrete Wavelet Packet Transform ArchitectureProceedings of the Seventh International Symposium on Signal Processing and Its Applications (ISSPA'03), II, IEEE (443-446)
    DOI: 10.1109/ISSPA.2003.1224909
    ISBN: 0-7803-7946-2
  • Pirsch, P.; Berekovic, M.; Stolberg, -.; Jachalsky, J. (2003): VLSI Architectures for MPEG-4Proc. 2003 International Symposium on VLSI Technology, Systems, and Applications, IEEE Press, Piscataway, NJ (208-212)
    ISBN: 0780377656
  • Reuter, C.; Martín, J.; Stolberg, -.; Pirsch, P. (2003): Performance Estimation of Streaming Media Applications for Reconfigurable PlatformsInternational Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS Initiative, Leiden (Die Niederlanden) (42-45)
    ISBN: 9080795712
  • Salewski, S.; Olbrich, M.; Barke, E. (2003): LIFT: Ein Multi-Layer IC Floorplanning Tool11. E.I.S.-Workshop: Entwurf Integrierter Schaltungen und Systeme, VDE Verlag GmbH (157-162)
    ISBN: 3800727609
  • Schneider, M.; Blume, H.; Noll, G. (2003): Verlustleistungsschätzung auf funktionaler Ebene für programmierbare ProzessorenProceedings der URSI Kleinheubacher Tagung 2003
  • Sherstnov, O.; Blume, H.; Noll, G. (2003): Verlustleistungsmodelle für Algorithmen zur Bewegungsschätzung auf FPGAsProceedings der URSI Kleinheubacher Tagung 2003
  • Stolberg, -.; Berekovic, M.; Friebe, L.; Moch, S.; Flügel, S.; Mao, X.; Kulaczewski, B.; Klußmann, H.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing ApplicationsProceedings Design, Automation and Test in Europe (DATE2003) - Designer's Forum, IEEE, Piscataway, NJ (8-13)
    ISBN: 0769518702
  • Stolberg, -.; Berekovic, M.; Friebe, L.; Moch, S.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal ProcessingProceedings 2003 IFIP International Conference on Very Large Scale Integration (VLSI-SoC), Technische Universität Darmstadt, Institute of Microelectronic Systems (155-160)
    ISBN: 3901882170
  • Stolberg, -.; Berekovic, M.; Friebe, L.; Moch, S.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal ProcessingProceedings 2003 IEEE Workshop on Signal Processing Systems, IEEE, Piscataway, NJ (189-194)
    ISBN: 0780377958
  • Wicht, B.; Larguier, J.; Schmitt-Landsiedel, D. (2003): A 1.5V 1.7ns 4k /spl times/ 32 SRAM with a fully-differential auto-power-down current sense amplifier2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.
    DOI: 10.1109/ISSCC.2003.1234387
  • Wicht, B.; Nirschl, T.; Schmitt-Landsiedel, D. (2003): A yield-optimized latch-type SRAM sense amplifierESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)
    DOI: 10.1109/ESSCIRC.2003.1257159
  • Abke, J.; Barke, E. (2002): A Direct Mapping System for Datapath Module and FSM Implementation into LUT-Based FPGAsD.A.TE 2002: 5th Design Automation and Test in Europe, IEEE Computer Society (1085)
    ISBN: 0769514715
  • Berekovic, M.; Stolberg, -.; Flügel, S.; Moch, S.; Kulaczewski, B.; Friebe, L.; Hilgenstock, J.; Mao, X.; Klussmann, H.; Pirsch, P. (2002): Implementing The MPEG-4 AS Profile on a Multi-Core System on Chip ArchitectureProceedings of 3rd Workshop and Exhibition on MPEG-4 (WEMP4), IEEE, MPEG-4 Industry Forum (M4IF)
  • Blume, H. (2002): Model Based Exploration of the Design Space for Heterogeneous Systems-on-CipElektronica Colloquium
  • Blume, H.; Feldkämper, H.; Huebert, H.; Noll, G. (2002): Design Space Exploration for Heterogeneous Systems-on-Chip using cost modelsProc. of the TI developers conference
  • Blume, H.; Herczeg, G.; Noll,, G. (2002): Object based refinement of motion vector fields applying probabilistic homogenization rulesDigest of the IEEE Int. Conference on Consumer Electronics, (340-341)
  • Blume, H.; Huebert, H.; Feldkämper, H.; Noll, G. (2002): Model based exploration of the design space for heterogeneous Systems on ChipProceedings of the IEEE ASAP Conference, (29-40)
  • Blume, H.; Huebert, H.; Feldkämper, H.; Noll,, G. (2002): Model based exploration of the design space for heterogeneous Systems on ChipProceedings of the IEEE Workshop "Heterogeneous reconfigurable Systems on Chip"
  • Blume, H.; Peters, G.; Noll, G. (2002): Design Space Exploration of Systems for video signal processing by the example of application oriented picture segmentationProceedings of the IEEE ISCE, (E51-E58)
  • Dalleau, D.; Weide-Zaage, K. (2002): 3-D Time-depending Simulation of Voids formation in a SWEAT Metallization StructureIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, 2002, pp 310-315
  • Feldkämper, H.; Blume, H.; Noll, G. (2002): Analyse von rekonfigurierbaren und heterogenen Architekturen für den Bereich der KommunikationstechnikProceedings of the URSI Kleinheubacher Tagung 2002, (165-169)
  • Feldkämper, H.; Gemmeke, T.; Blume, H.; Noll,, G. (2002): Analysis of reconfigurable and heterogeneous architectures in the communication domainProceedings of the IEEE ICCSC 2002, (190-193)
  • Freimann, A. (2002): Simulationsfreie Verlustleistungsbestimmung für Architekturen der digitalen Signalverarbeitung3. Kolloquium des Schwerpunktprogramms der DFG "VIVA (Grundlagen und Verfahren verlustarmer Informationsverarbeitung)", TU Chemnitz (68-75)
    ISBN: 3000089950
  • Freimann, A. (2002): Probabilistic Power Estimation for Digital Signal Processing ArchitecturesLecture Notes in Computer Science (LNCS2451): Integrated Circuit Design - Proceedings PATMOS 2002, Springer-Verlag, Berlin Heidelberg (459-467)
    ISBN: 03029743
  • Hartong, W.; Hedrich, L.; Barke, E. (2002): On Discret Modeling and Model Checking for Nonlinear Analog SystemsCAV 2002: Conference on Computer-Aided Verification, Springer Verlag, Berlin
  • Hartong, W.; Hedrich, L.; Barke, E. (2002): Model Checking Algorithms for Analog VerificationDAC 2002
  • Hartong, W.; Hedrich, L.; Barke, E. (2002): An Approach to Model Checking for Nonlinear Analog SystemsDate 2-1, IEEE Computer Society, Los Alamitos (1080-1080)
    ISBN: 0769514715
  • Jachalsky, J.; Kulaczewski, B.; Pirsch, P. (2002): Project Management and Verification - The Key Problems of Student Chip Design CoursesProceedings of the 32nd ASEE/IEEE Frontiers in Education Conference (FIE 2002), IEEE Press, Piscataway, NJ (CD-ROM)
    ISBN: 0780374452
  • Jachalsky, J.; Pirsch, P. (2002): ChipDesign - A Novel Approach to Project-Oriented CoursesProceedings of the 4th European Workshop on Microelectronics Education (EWME 2002), Marcombo de Boixareu Editores, Barcelona (241-243)
    ISBN: 8426713254
  • Jachalsky, J.; Wahle, M.; Pirsch, P.; Gehrke, W. (2002): A Flexible, Fully Configurable Architecture for MPEG-2 Video EncodingProceedings of the 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002), IEEE Press, Piscataway, NJ (1063-1066)
    ISBN: 0780375963
  • Kloos, H.; Friebe, L.; Simon-Klar, C.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Pirsch, P. (2002): HiPAR-DSP 16 for the Development of a Scalable Real- Time SAR ProcessorEUSAR 2002, VDE, Berlin (425-428)
    ISBN: 3-8007-2697-1
  • Kloos, H.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Friebe, L.; Klar, C.; Pirsch, P. (2002): HIPAR-DSP 16, A SCALABLE HIGHLY PARALLEL DSP CORE FOR SYSTEM ON A CHIP VIDEO- AND IMAGE PROCESSING APPLICATIONSAcoustics, Speech, and Signal Processing, 2002 IEEE International Conference on, Volume 3, IEEE, Piscataway (CD-ROM)
    ISBN: 0780374029
  • Langerwerf, M.; Reuter, C.; Kropp, H.; Pirsch, P. (2002): Benefits of Macro-based Multi-FPGA Partitioning for Video Processing Applications13th IEEE International Workshop on Rapid System Prototyping, IEEE Computer Society, Los Alamitos CA (60-65)
    DOI: 10.1109/IWRSP.2002.1029739
    ISBN: 076951703X
  • Lemke, A.; Hedrich, L.; Barke, E. (2002): Analog Circuit Sizing Based on Formal Methods Using Affine ArithmeticICCAD 2-1, IEEE Computer Society (486-489)
    ISBN: ISBN 0780376072
  • Malonnek, C.; Olbrich, M.; Barke, E. (2002): A New Placement Algorithm for an Interconnect Centric Design FlowASIC/SOC 2-1, IEEE Press (416-420)
    ISBN: 0780374940
  • Näthke, L.; Hedrich, L.; Barke, E. (2002): Betrachtungen zur Simulationsgeschwindigkeit von Verhaltensmodellen nichtlinearer integrierter AnalogschaltungenAnalog 2-1, (107-112)
  • Payá-Vayá, G.; Martinez-Peiro, M.; Ballester, J.; Gadea, R.; Herrero, V. (2002): Fast Ethernet Media Access Controller CoreDesigners' Forum Proceedings of Design, Automation and Test in Europe (DATE'02), (183-186)
  • Payá-Vayá, G.; Mocholi, A.; Sanchez, C.; Ibanez, F. (2002): Sensorial Module of a Module Robot based on Ultrasonic SensorsInternational Conference on Communication, Electronics and Control (TELEC'02), (95)
    ISBN: 84-8138-506-2
  • Popp, R.; Oehmen, J.; Hedrich, L.; Barke, E. (2002): "Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog Circuits"DATE2002: 5th Design Automation and Test in Europe, IEEE Computer Soc., Los Alamitos, CA (274-278)
    ISBN: 0769514715
  • Salewski, S.; Barke, E. (2002): An Upper Bound for 3D Slicing FloorplansProceedings of 7th ASPDAC and 15th Int'l Conf. on VLSI Design (2002), IEEE Computer Society Press, Los Alamitos (567-572)
    ISBN: 0769514413
  • Simon-Klar, C.; Friebe, L.; Kloos, H.; Lieske, H.; Hinrichs, W.; Pirsch, P. (2002): A Multi DSP Board for Real Time SAR Processing using the HiPAR-DSP 16Proceedings of the International Geoscience and Remote Sensing Symposium 2002, IEEE International (2750-2752)
    ISBN: 0780375360
  • Stolberg, -.; Berekovic, M.; Pirsch, P. (2002): A Platform-Independent Methodology for Performance Estimation of Streaming Media ApplicationsProceedings 2002 IEEE International Conference on Multimedia and EXPO (ICME2002), IEEE Press, Piscataway, NJ (CD-ROM)
    ISBN: 0780373057
  • Sydow, v.; Blume, H.; Noll, G. (2002): Performance-Analyse von General-Purpose und DSP-Kernels für heterogene Systems-on-ChipProceedings of the URSI Kleinheubacher Tagung 2002, (171-175)
  • Abke, J.; Barke, E. (2001): A New Placement Method for Direct Mapping into LUT-Based FPGAsFPL2001: 11th Conference on Field-Programmable Logic and Applications, (27-36)
  • Armbruster, H.; Frerichs, M.; Hufeld, K.; Olbrich, M. (2001): Ein integrierter parallelisierter Design-Flow zur selektiven und hochgenauen Extraktion parasitärer Elemente der Leitbahnen integrierter Schaltungen10. E.I.S.-Workshop: Entwurf integrierter Schaltungen (8. ITG-Fachtagung), VDE Verlag, Berlin, Offenbach (149-154)
    ISBN: 3800726084
  • Berekovic, M.; Stolberg, -.; Pirsch, P. (2001): Implementing the MPEG-4 AS Profile for Streaming Video on a SOC Multimedia ProcessorProceedings of the 3rd Workshop on Media and Streaming Processors (MSP-3), Keiner (39-44)
    ISBN: Keine
  • Berekovic, M.; Stolberg, -.; Pirsch, P.; Runge, H. (2001): A Programmable Co-Processor for MPEG-4 VideoInternational Conference on Acoustics, Speech and Signal Processing, IEEE Press, Piscataway, NJ (CD-ROM)
    ISBN: 0780370414
  • Blume, H.; Blüthgen, -.; Noll, G. (2001): Integration von hochperformanten ASIC's in rekonfigurierbare Systeme zur Bereitstellung zusätzlicher Multimedia-FunktionalitätenTagungsband des MPC-Workshop
  • Blume, H.; Feldkämper, H.; Hübert, H.; Noll,, G. (2001): Analyzing heterogeneous system architectures by means of cost functions: A comparative study for basic operationsProceedings der 27. European Solid State Circuits Conference, (424-427)
  • Blume, H.; Feldkämper, H.; Hübert, H.; Noll,, G. (2001): Operatorbasierte Analyse rekonfigurierbarer heterogener SystemeTagungsband der ITG-Fachtagung Elektronische Medien, (189-194)
  • Feldkämper, H.; Hübert, H.; Blume, H.; Noll, G. (2001): Analyse rekonfigurierbarer heterogener Systeme anhand einer Komponente für einen UltraschallscannerTagungsband der Kleinheubacher Tagung 2001
  • Friebe, L.; Kloos, H.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Klar, C.; Pirsch, P. (2001): A Compact Real-Time SAR Processing System using the Highly Parallel HiPAR-DSP 16International Geoscience and Remote Sensing Symposium 2001, IEEE, Piscataway (CD-ROM)
    ISBN: 0780370333
  • Friebe, L.; Kloos, H.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Pirsch, P. (2001): Multi-DSP-Board for Compact Real-Time Synthetic Aperture Radar SystemsAerosense Conference Proceedings on Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VI, SPIE, Bellingham
    ISBN: 0819440612
  • Gause, J.; Reuter, C.; Kropp, H.; Cheung, P.; Luk, W. (2001): The Effect of FPGA Granularity on Video Codec ImplementationsField-Programmable Custom Computing Machines (FCCM '01)
  • Gerbershagen, M.; Stürmer, A.; Decker, M.; Lienig,, J.; Jerke, G.; Decker, P.; Brocke, H.; Klausen, R. (2001): Stromdichteanalyse von Leitbahnen integrierter Schaltungen10. E.I.S.-Workschop: Entwurf integrierter Schaltungen (8. ITG Fachtagung), VDE Verlag, Berlin (161-165)
    ISBN: 3800726084
  • Harbich, K.; Bringmann, O.; Barke, E. (2001): PuMA++: A Fully Automatic Path from Specification to Multi-FPGA-PrototypeFPGA 01: International Conference on Field Programmable Gate Arrays
  • Hermann, A.; Gärtner, R.; Schlöffel, J.; Barke, E. (2001): Extraktion und Simulation parasitärer Substrateffekte an einer Mixed-Signal CMOS-Schaltung10. E.I.S.-Workshop: Entwurf integrierter Schaltungen (8. ITG-Fachtagung), (75-80)
  • Hinrichs, W.; Wittenburg, P.; Lieske, H.; Kloos, H.; Friebe, L.; Pirsch, P. (2001): HiPAR-DSP16: VLSI-Design of a Second Generation Programmable Parallel Multimedia-DSPDAC 2001, Student Design Contest, nicht veröffentlicht
    ISBN: -
  • Kloos, H.; Friebe, L.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Pirsch, P. (2001): HiPAR-DSP 16, A new DSP for Onboard Real-Time SAR SystemsAerosense Conference Proceedings on Photonic and Quantum Technologies for Aerospace Applications III, SPIE, Bellingham
    ISBN: 0819440817
  • Kulaczewski, B.; Zimmermann, S.; Barke, E.; Pirsch, P. (2001): CHIPDESIGN - A Novel Project-oriented Microelectronics Course2001 International Conference on Microelectronic Systems Education (MSE 2001), IEEE Computer Society, Los Alamitos, USA (71-72)
    ISBN: 0769511562
  • Küter, J.; Barke, E. (2001): Architecture Driven PartitioningDATE2001: 4th Design Automation and Test in Europe, (479-485)
  • Lienig, J.; Jerke, P. Decker, P.;. Gerbershagen, M.; Stürmer, A.; Adler, T.; Schreiner, L.;Barke, E. (2001): Stromabhängige Verdrahtung von Analogschaltungen10. E.I.S.-Workshop: Entwurf integrierter Schaltungen (8. ITG-Fachtagung), (167-170)
  • Näthke, L.; Popp, R.; Hedrich, L.; Barke, E. (2001): Automatic Analog Behavioral Model GenerationUniversity Booth DATE2001: 4th Design Automation and Test in Europe
  • Nirschl, T.; Wicht, B.; Schmitt-Landsiedel, D. (2001): High Speed, Low Power Design Rules for SRAMPrecharge and Self-timing under TechnologyVariations
  • Olbrich, M.; Popp, R.; Näthke, L.; Hedrich, L.; Barke, E. (2001): A Combined Structural and Symbolic Method for Automatic Behavioral Modeling of Nonlinear Analog CircuitsProceedings of the 15th European Conference on Circuit Theory and Design (ECCTD 01), Helsinki University of Technology, Espoo, Finnland (II-229-232)
    ISBN: 9512255731
  • Olbrich, M.; Rein, A.; Barke, E. (2001): An Improved Hierarchical Classification Algorithm for Structural Analysis of Integrated CircuitsDATE2001: 4th Design Automation and Test in Europe, (807)
  • Stolberg, -.; Berekovic, M.; Pirsch, P.; Runge, H. (2001): Implementing the MPEG-4 Advanced Simple Profile for Streaming Video ApplicationsProceedings International Conference on Multimedia and EXPO (ICME2001), IEEE Press, Piscataway, USA (297-300)
    ISBN: 0769511988
  • Stolberg, -.; Berekovic, M.; Pirsch, P.; Runge, H. (2001): The MPEG-4 Advanced Simple Profile - A Complexity StudyProceedings of the 2nd Workshop and Exhibition on MPEG-4, n/a (33-36)
    ISBN: n/a
  • Weide-Zaage, K.; Keck, C. ; Willemen, J. (2001): Verifikation der Layout getreuen FE-Simulation eines MO-166 Gehäuses mittels elektrischer Messung und IR-UntersuchungE.I.S.-Workshop, ITG Fachbericht „Entwurf Integrierter Schaltungen und Systeme“, pp. 219-222
  • Weide-Zaage, K.; Keck, Dalleau, D. (2001): Thermal Investigation of a Jedec MO-166 Package by finite element simulationsIEEE International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), pp. 113-116
  • Wicht, B.; Martiny, I.; Schmitt-Landsiedel, D.; Paul, S.; Sanders, A. (2001): Speeding up CMOS cameras and optical receivers by improved column multiplexerOptoelectronic Integrated Circuits and Packaging V
  • Wicht, B.; Paul, S.; Schmitt-Landsiedel, D. (2001): Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiersIEEE Journal of Solid-State Circuits ( Volume: 36 , Issue: 11 , Nov 2001 )
    DOI: 10.1109/4.962297
  • Wicht, B.; Paul, S.; Schmitt-Landsiedel, D. (2001): MEMORY PAPERS-Analysis and Compensation of the Bitline Multiplexer in SRAM Current Sense AmplifiersIEEE Journal of Solid State Circuits-Institute of Electrical and Electronics Engineers
  • Wicht, B.; Schmitt-Landsiedel, D.; Paul, S. (2001): A simple low voltage current sense amplifier with switchable input transistorProceedings of the 27th European Solid-State Circuits Conference
  • Wicht, B.; Schmitt-Landsiedel, D.; Paul, S.; Sanders, A. (2001): SRAM current-sense amplifier with fully-compensated bit line multiplexer2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)
    DOI: 10.1109/ISSCC.2001.912591
  • Willemen, J.; Soppa, W.; Pieper, K.W.; Weide-Zaage, K.; Gärtner, R. (2001): Vergleich industrieller Entwicklungswerkzeuge für elektrothermische SchaltungssimulationE.I.S.-Workshop, ITG Fachbericht „Entwurf Integrierter Schaltungen und Systeme“, pp. 143-146
  • Abke, J.; Barke, E. (2000): CoMGen: Direct Mapping of Arbitrary Components into LUT-Based FPGAsFPL2000: 10th Conference on Field-Programmable Logic and Applications, (191-200)
  • Adler, L.; Barke, E. (2000): Single Step Current Driven Routing of Multiterminal Signal Nets for Analog ApplicationsDATE 2000: 3th Design Automation and Test in Europe, (446-450)
  • Adler, T.; Brocke, H.; Hedrich, L.; Barke, E. (2000): A Current Driven Routing and Verification Methodology for Analog ApplicationsDAC 2000: 37th Design Automation Conference, (385-389)
  • Berekovic, M.; Pirsch, P.; Selinger, T.; Wels, -.; Miro, C.; Lafage, A.; Heer, C.; Ghigo, G. (2000): Architecture of an Image Rendering Co-Processor for MPEG-4 SystemsProceedings of ASAP 2000, IEEE Computer Society, Los Alamitos, California (15-24)
    ISBN: 0769507166
  • Berekovic, M.; Stolberg, -.; Pirsch, P.; Selinger, T.; Wels, -.; Miro, C.; Lafage, A.; Heer, C.; Ghigo, G. (2000): Co-Processor Architecture for MPEG-4 Main Profile Visual CompositingProceedings International Symposium on Circuits and Systems (ISCAS), IEEE Press, Piscataway, NJ (II 180-183)
    ISBN: 0780354826
  • Blume, H.; Blüthgen, -.; Henning, C.; Osterloh,, P. (2000): Integration of High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia FunctionalityInternational Conference on Application-specific Systems, Architectures and Processors, (66-75)
  • Blume, H.; Blüthgen, -.; Osterloh, P.; Noll, G. (2000): Coprozessor-Boards zur Integration zusätztlicher Multimedia-FunktionalitätenTagungsband der FKTG-Tagung 2000, (771-788)
  • Blume, H.; Schwann, R.; Joern, H.; Noll, G. (2000): Ein DSP-basierter echtzeitfähiger Demonstrator zur Power-Doppler-Analyse in medizinischen Ultraschall-SystemenTagungsband der DSP-Deutschland, (191-202)
  • Blüthgen, -.; Osterloh, P.; Blume, H.; Noll, G. (2000): A Hardware-Implementation for Approximate Text Search in Multimedia ApplicationsProceedings of the IEEE International Conference on Multimedia and Expo, (1425-1428)
  • Brocke, H.; Hedrich, L.; Klausen, R.; Barke, E. (2000): Current Density Calculation of Integrated Circuit InterconnectMICRO.tec 2000 Proceedings Volume 2, VDE Verlag, Berlin (77-81)
    ISBN: 3800725797
  • Dalleau, D.; Weide-Zaage, K. (2000): 3-D Time-Depending Electro- and Thermomigration Simulation of Metallization StructuresAdv. Met. Conf. (AMC 2000), Proc. Conf., Mater. Res. Soc, pp. 477-481
  • Freimann, A. (2000): Framework for High-Level Power Estimation of Signal Processing ArchitecturesLecture Notes in Computer Science (LNCS1918): Proceedings PATMOS 2000, D. Soudris, P. Pirsch, E. Barke, Springer Verlag, Heidelberg (56-65)
    ISBN: 03029743
  • Harbich, K. (2000): PuMA++: Ein universelles Abbildungssystem für Multi-FPGA Rapid-Prototyping-SystemeITG Workshop Mikroelektronik für die Informationstechnik, (231-234)
  • Harbich, K.; Abke, J.; Barke, E. (2000): An Optimised Partitioning and Mapping Environment for Rapid Prototyping of Structural RT-level Circuit DescriptionsDATE 00: 3rd Design Automation and Test in Europe, University Booth
  • Heer, C.; Miro, C.; Lafage, A.; Berekovic, M.; Ghigo, G.; Selinger, T.; Wels, -. (2000): Co-processor architecture for MPEG-4 video object renderingSPIE conference on Visual Communications and Image Processing (VCIP'00) Perth, June 2000, SPIE
    ISBN: 0819437034
  • Hermann, A.; Silvant, M.; Schlöffel, J.; Barke, E. (2000): PARCOURS - Substrate Crosstalk Analysis for Complex Mixed-Signal-CircuitsPATMOS 2000: 10th International Workshop, (306-315)
  • Herrmann, K.; Moch, S.; Hilgenstock, J.; Pirsch, P. (2000): Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated CircuitProceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT2000), IEEE Computer Society, Los Alamitos, California (105-113)
    ISBN: 0769507190
  • Hilgenstock, J.; Herrmann, K.; Moch, S.; Pirsch, P. (2000): A Single-Chip Video Signal Processing System with Embedded DRAMIEEE Workshop on Signal Processing Systems 2000 (SIPS), IEEE Press, Piscataway, NJ (23-32)
    ISBN: 0780364880
  • Kloos, H.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Friebe, L.; Pirsch, P. (2000): HiPAR-DSP 16 A Parallel DSP for Onboard Real-Time Processing of Synthetic Aperture Radar DataInternational Geoscience and Remote Sensing Symposium Proceedings 2000, IEEE, Piscataway, NY, USA (CD-ROM)
  • Kropp, H.; Reuter, C. (2000): A Mapping Methodology for Code Trees onto LUT-based FPGAsProceedings of the 10th Int. Works. on Field-Programmable Logic & Applications (FPL 2000), Springer, Villach, Austria (221-229)
    ISBN: 3540678999
  • Martiny, I.; Leuner, R.; Wicht, B. (2000): Cross-talk reduction and efficiency of integrated photodiodes shown by an integrated edge detectorOptoelectronic Integrated Circuits IV
  • Popp, R.; Barke, E. (2000): Symbolic Analysis of Nonlinear Analog Circuits by Simplification of Nested ExpressionsSMACD 2000: Proc. 7th Int. Workshop on Symbolic Methods and Applications in Circuit Design, (151-154)
  • Ringe, M.; Lindenkreuz, T.; Barke, E. (2000): Static Timing Analysis Taking Crosstalking into AccountDATE 2000: 3th Design Automation and Test in Europe, (451-455)
  • Rudack, M.; Redeker, M.; Treytnar, D.; Mende, O.; Moch, S. (2000): Ein großflächig integriertes, selbstkonfigurierendes Multiprozessorsystem für die VideosignalverarbeitungITG-Fachtagung, Darmstadt
  • Steiner, R.; Dörrer, L.; Punzenberger, M.; Hedrich, L.; Hartong, W. (2000): Design Story of Low-Voltage and Low-Power Converter and Filter Structures for Wireless SystemsProc. of the 3rd International Workshop of the European Low Power Initiative for Electronic System Design (ESDLPD 2000), (177-210)
  • Stolberg, -.; Berekovic, M.; Pirsch, P.; Runge, H.; Möller, H.; Kneip, J. (2000): The M-PIRE MPEG-4 CODEC DSP and its Macroblock EngineProceedings IEEE International Symposium on Circuits and Systems (ISCAS), IEEE Press, Piscataway, NJ (II 192-195)
    ISBN: 0780354826
  • Wittenburg, P.; Hinrichs, W.; Lieske, H.; Kloos, H.; Friebe, L.; Pirsch, P. (2000): HiPAR-DSP - a Scalable Family of High Performance DSP-CoresProceedings of the 13th Annual IEEE International ASIC/SOC Conference, Institute of Electrical and Electronics Engineers, Inc (IEEE); Piscataway, NJ (92-96)
    ISBN: 0780365984
  • A. Lemke, W. Hartong, E. Barke (1999): Dimensionierung analoger Schaltungen unter Verwendung intervallarithmetischer VerfahrenAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (87-88)
  • Berekovic, M.; Jacob, K.; Pirsch, P. (1999): Architecture of a Hardware Module for MPEG-4 Shape DecodingProceedings of ISCAS'99, (157-160)
  • Berekovic, M.; Lieske, H.; Kloos, H.; Pirsch, P. (1999): Branch Prediction for a SIMD DSP Array ProcessorInternational Conference on Signal Processing Applications and Technology (ICSPAT), (CD-ROM)
  • Berekovic, M.; Pirsch, P.; Selinger, T.; Wels, -.; Lafage, A.; Miro, C.; Ghigo, G.; Heer, C. (1999): The TANGRAM co-processor for MPEG-4 Visual Compositing1999 IEEE Workshop on Signal Processing Systems (SiPS'99), (311-320)
  • Berekovic, M.; Stolberg, -.; Pirsch, P.; Möller, H.; Runge, H.; Kneip, J. (1999): The MPIRE MPEG-4 Codec DSP1st Workshop on Media Processors and DSPs (MP-DSP), (62-67)
  • Blüthgen, -.; Blume, H.; Noll, G. (1999): Hardware-Implementierung für die approximative Textsuche in multimedialen AnwendungenITG-Fachtagung Multimedia: Anwendungen, Technologie, Systeme, (229-235)
  • C. Malonnek, E. Barke (1999): Entwurf eines Testchips zur Messung parasitärer EffekteAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (68+69)
  • F. Shaikh-Brocke, L. Hedrich, T. Adler, E. Barke, M. Laage, A. Stürmer, C. Rödel (1999): Berechnung der Stromdichten des Leitbahnsystems integrierter SchaltungenAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (52-53)
  • Heer, C.; Miro, C.; Lafage, A.; Berekovic, M. (1999): Design and Architecture of the MPEG-4 Video Rendering Co-ProcessorProceedings of ICECS'99, (1205-1210)
  • Hilgenstock, J.; Herrmann, K.; Pirsch, P. (1999): Memory Organzation of a Single-Chip Video Signal Processing System with Embedded DRAM9th Great Lakes Symposium on VLSI, (42-45)
  • Hinrichs, W.; Wittenburg, P.; Lieske, H.; Kloos, H.; Ohmacht, M.; Pirsch, P. (1999): A 1.3 GOPS Parallel DSP for High Performance Image Processing ApplicationsProceedings of the 25th European Solid-State Circuits Conference (ESSCIRC), (102-105)
  • Hinrichs, W.; Wittenburg, P.; Lieske, H.; Kloos, H.; Ohmacht, M.; Pirsch, P. (1999): A Parallel DSP for High Performance Image Processing ApplicationsInternational Conference on Signal Processing Applications and Technology Proceedings 1999 (ICSPAT), (CD-ROM)
  • J. Abke, E. Barke, M. Heeke, D. Kannemacher (1999): RIG: Targeting Designs with Embedded Memories to ASIC and FPGA TechnologiesInternational Workshop on IP Based Synthesis and System Design, (237-240)
  • J. Abke, J. Stohmann, E. Barke (1999): A Universal Module Generator for LUT-Based FPGAs10th IEEE Workshop on Rapid System Prototyping, (230-235)
  • K. Harbich (1999): Delay Optimized Hardware Implementation of Structural RT-level Circuit Descriptions into Heterogeneous SRAM-based FPGA-ArraysDAC 99: 36th Design Automation Conference, Ph.D. Forum
  • K. Harbich, J. Stohmann, L. Schwoerer, E. Barke (1999): A Case Study: Logic Emulation - Pitfalls and SolutionsRSP 99: 10th IEEE Workshop on Rapid System Prototyping, (160-163)
  • Kloos, H.; Berekovic, M.; Pirsch, P. (1999): Hardware Realisierung einer JAVA Virtual Machine für High Performance Multimedia-AnwendungenArchitektur von Rechnersystemen (ARCS'99), (5-15)
  • Kloos, H.; Wittenburg, J.; Hinrichs, W.; Lieske, H. (1999): Implementation of Real-Time SAR-Systems with a High Performance Digital Signal ProcessorProceedings Europto Series Image and Signal Processing for Remote Sensing V, (343-347)
  • Kloos, H.; Wittenburg, P.; Hinrichs, W.; Lieske, H.; Pirsch, P. (1999): A High Performance Digital Signal Processor for Compact Realization of Real-Time Synthetic Aperture Radar SystemsInternational Geoscience and Remote Sensing Symposium Proceedings, (CD-ROM)
  • Kropp, H.; Reuter, C.; Pirsch, P. (1999): An FPGA-based Prototyping System for Video Processing SchemesProceedings 9th International Workshop on Field Programmable Logic and Applications (FPL'99), (333-338)
  • L. Näthke, R. Popp, L. Hedrich, E. Barke (1999): Using Term Ordering to Improve Symbolic Behavioral Model Generation of Nonlinear Analog CircuitsECCTD99: European Conference on Circuit Theory and Design, (74-77)
  • Lieske, H.; Wittenburg, J.; Hinrichs, W.; Kloos, H.; Ohmacht, M.; Pirsch, P. (1999): Enhancements for a Second Generation Parallel Multimedia-DSP1st Workshop on Media Processors and DSPs (MP-DSP), (68-77)
  • M. Klemme, E. Barke (1999): An Extended Bipolar Transistor Model For Substrate Crosstalk AnalysisSSCS 99: IEEE Custom Integrated Circuits Conference, (579-582)
  • M. Klemme, E. Barke (1999): Modellierung von Übersprechen durch das Substrat für die Schaltungssimulation von integrierten Mixed-Signal-SchaltungenAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (66+67)
  • M. Klemme, J. Schlöffel, E. Barke (1999): Modélisation de couplage électromagnétique par le substrat pour la simulation des circuits intégrésFTFC99: 2ème Journées Francophones d'études Faible Tension Faible Consommation, Recueil des Communications, (S.119-125)
  • Olbrich, M.; Rein, A.; Barke, E. (1999): Ein neuer hierarchischer Klassifizierungsalgorithmus zur strukturellen Analyse integrierter SchaltungenAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (77+78)
  • Pirsch, P. (1999): Architectures for Multimedia Signal ProcessingProceedings 1999 IEEE Workshop on Signal Processing Systems (SiPS'99), (1-12)
  • R. Popp, L. Näthke, C. Borchers (1999): Automatische Erzeugung symbolischer Verhaltensmodelle für nichtlineare Analogschaltungen im transienten GroßsignalbetriebAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden
  • S. Zimmermann, E. Barke (1999): Benchmarking von RLC-NetzwerkreduktionsverfahrenAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (145-146)
  • Stolberg, -.; Ohmacht, M.; Pirsch, P. (1999): Cellular Multiprocessor Arrays with Adaptive Resource UtilizationParallel Computation: Proceedings 4th International ACPC Conference, (480-489)
  • T. Wichmann, R. Popp, W. Hartong, L. Hedrich (1999): On the Simplification of Nonlinear DAE Systems in Analog Circuit DesignComputer Algebra in Scientific Computing/CASC'99, Springer, Berlin, heidelberg (485-499)
    ISBN: 354066047X
  • W. Hartong, L. Hedrich, E. Barke (1999): Ein Ansatz zur formalen Verifikation nichtlinearer statischer Analogschaltungen mit ParametertoleranzenAnalog 99: 5. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (93-94)
  • Weide, K.; Gärtner, R. (1999): Infrarot-Untersuchung und Finite-Elemente-Simulation eines keramikgehäusten integrierten SpannungsreglersProc. Conf., 5. ITG/GMM-Diskussionssitzung, Analog 99, pp. 431-436
  • Weide, K.; Keck, C. (1999): Influence of Different Materials on the Thermal Behaviour of a CDIP-8 Ceramic PackageProc. Conf. SPIE In-Line Methods and Monitors for Process and Yield Improvement, Santa Clara, pp. 157-163
  • Wittenburg, J.; Hinrichs, W.; Ohmacht, M.; Lieske, H.; Kloos, H.; Pirsch, P. (1999): HiPAR-DSP: Ein 1.3 GOPS Multimedia SignalprozessorArchitektur von Rechensystemen (ARCS '99) GI/ITG Fachtagung, (15-21)
  • Wittenburg, P.; Meyer, G.; Pirsch, P. (1999): Adapting and Extending Simultaneous Multithreading for High Performance Video Signal Processing ApplicationsWorkshop on Multi-Threaded Execution, Architecture and Compilation (MTEAC)
  • Wittenburg, P.; Pirsch, P.; Meyer, G. (1999): A Multithreaded Architecture Approach to Parallel DSPs for High Performance Image Processing Applications1999 IEEE Workshop on Signal Processing Systems (SiPS '99), (241-250)
  • Berekovic, M.; Frase, R.; Pirsch, P. (1998): A Flexible Processor Architecture for MPEG-4 Image CompositingProceedings of ICASSP'98
  • Berekovic, M.; Heistermann, D.; Pirsch, P. (1998): A Core Generator for Fully Synthesizable and Highly Parameterizable RISC-Cores for Systems-On-Chip Designs1998 IEEE Workshop on Signal Processing Systems (SiPS '98), (561-568)
  • Berekovic, M.; Kloos, H.; Pirsch, P. (1998): Parallele Implementierung einer JAVA Virtual Machine mit Erweiterungen für MultimediaITG Fachbericht 147, ITG Fachtagung Mikroelektronik für die Informationstechnik 1998, (305-310)
  • Berekovic, M.; Meyer, G.; Guo, Y.; Pirsch, P. (1998): A Multimedia RISC Core for Efficient Bitstream Parsing and VLDMultimedia Hardware Architectures, Proceedings of SPIE, 3311, (131-141)
  • Berekovic, M.; Pirsch, P. (1998): An Array Processor with Parallel Data Cache for Image Rendering and CompositingProceedings of Computer Graphics International CGI98, (411-414)
  • Berekovic, M.; Pirsch, P. (1998): Architecture of a Coprocessor Module for Image CompositingInternational Conference on Electronics, Circuits and Systems, 2, (203-206)
  • Blume, H.; Häring, J.; Schröder, H. (1998): Parallel Evolutionary Optimization of Nonlinear Filters for UpconversionProceedings of the IEEE ProRISC Workshop on Circuits Systems and Signal Processing, (35-42)
  • Blume, H.; Schmidt, M.; Schröder, H. (1998): Anwendung von Evolutionsstrategien zur Optimierung von Algorithmen der VideosignalverarbeitungVDI/VDE Workshop on Computational Intelligence, (221-236)
  • Do, -.; Kropp, H.; Reuter, C.; Pirsch, P. (1998): Alternative Approaches Implementing High-Performance FIR Filters on Lookup Table-Based FPGAs: A ComparisonProceedings of the SPIE (3526): Configurable Computing: Technology and Applications, SPIE, Bellingham (248-254)
    ISBN: 0819429872
  • Do, T.; Kropp, H.; Reuter, C.; Pirsch, P. (1998): A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAsLecture Notes in Computer Science: Field Programmable Logic and Applications (8th International Workshop FPL'98), 1482, R. W. Hartenstein, A. Keevallik, (441-445)
  • Do, T.; Kropp, H.; Reuter, C.; Schwiegershausen, M.; Pirsch, P. (1998): Implementierung von Pipeline-Multiplizierern auf Xilinx FPGAsITG Fachbericht 147, ITG Fachtagung Mikroelektronik für die Informationstechnik 1998, (83-88)
  • Franzen, O.; Jostschulte, K.; Blume, H.; Schröder, H. (1998): Einsatz parallelisierter Evolutionsstrategien für den Filterentwurf in der Bildsignalverarbeitung8. Workshop Fuzzy Control des GMA-FA 5.22, (298)
  • Freimann, A.; Brune, T.; Pirsch, P. (1998): Mapping of Video Decoder Software on a VLIW DSP MultiprocessorMultimedia Hardware Architectures, Proceedings of SPIE, 3311, (67-78)
  • Herrmann, K.; Hilgenstock, J.; Pirsch, P. (1998): A Single Chip Video Coding System with Embedded DRAM Frame Memory for Stand-Alone Applications11th IEEE Int. ASIC Conference 1998, (319-323)
  • Hilgenstock, J.; Herrmann, K.; Otterstedt, J.; Niggemeyer, D.; Pirsch, P. (1998): A Video Signal Processor for MIMD MultiprocessingDesign Automation Conference (DAC) 1998, (50-55)
  • Hinrichs, W.; Wittenburg, P.; Ohmacht, M.; Kneip, J.; Pirsch, P. (1998): HiPAR-DSP: Ein paralleler VLIW RISC-Prozessor für die EchtzeitbildverarbeitungITG Fachbericht 147, ITG Fachtagung Mikroelektronik für die Informationstechnik 1998, (257-262)
  • J. Abke, E. Böhl, C. Henno (1998): Emulation Based Real Time Testing of Automative Applications4th IEEE IOLTW: International On-Line Testing Workshop, (28-31)
  • Jeschke, H. (1998): Fuzzy Multiobjective Decision Making On Modeled VLSI Architecture ConceptsProceedings of the International Symposium on Circuits And Systems (ISCAS)
  • K. Harbich, H. Hoffmann, E. Barke (1998): A New Hierachical Graph Model for Multiple FPGA PartitioningWDTA 98: IEEE Workshop on Design, Test and Application, (101-104)
  • Kropp, H.; Reuter, C.; Do, T.; Pirsch, P. (1998): A Generator for Pipelined Multipliers on FPGAs9th International Conference on Signal Processing Applications and Technology, 1, (669-673)
  • Kropp, H.; Reuter, C.; Pirsch, P. (1998): The Video and Image Processing Emulation System VIPESNinth IEEE International Workshop on Rapid System Prototyping, (170-175)
  • Kropp, H.; Reuter, C.; Wiege, M.; Pirsch, P. (1998): Emulation von Bildverarbeitungsverfahren am Beispiel der Diskreten Cosinus TransformationITG Fachtagung Mikroelektronik für die Informationsverarbeitung, ITG Fachbericht 147 (71-76)
  • L. Hedrich, E. Barke (1998): A Formal Approach to Verification of Linear Analog Circuits with Parameter TolerancesDATE 98: Design, Automation and Test in Europe
  • M. Klemme, E. Barke (1998): Accurate Junction Capacitance Modelling for Substrate Crosstalk CalculationPATMOS 1998: 8th International Workshop, (297-306)
  • Musmann, G.; Mech, R.; Hilgenstock, J. (1998): Sensor Data Reduction and Implementation for IR Image TransmissionSPIE's International Symposium on Optical Science, Engineering, and Instrumentation 1998 - Infrared Technology and Applications XXIV, 3436/1, (448-457)
  • Ohmacht, M.; Stolberg, -.; Pirsch, P. (1998): Adaptive Resource Utilization in Cellular Multiprocessor ArraysProceedings 6th IEEE International Workshop on Intelligent Signal Processing and Communication Systems, (571-575)
  • Ohmacht, M.; Wittenburg, P.; Pirsch, P. (1998): Influences of Object Based Segmentation onto Multimedia Hardware ArchitecturesInternational Symposium on Circuits and Systems, 4, (45-48)
  • Pirsch, P.; Stolberg, J. (1998): VLSI Architectures for MultimediaInternational Conference on Electronics, Circuits and Systems, 1, (3-11)
  • R. Popp, W. Hartong, L. Hedrich, E. Barke (1998): Error Estimation on Symbolic Behavioral Models of Nonlinear Analog CircuitsSMACD 1998: 5th International Conference on Symbolic Methods and Applications to Circuits Design
  • R. Sedaghat (1998): Fault Emulation with Optimized Assignment of Circuit Nodes to FIISCAS 98: IEEE International Symposium on Circuit and Systems
  • R. Sedaghat (1998): Eine Methode zur FehleremulationITG
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  • Stolberg, -.; Ohmacht, M.; Pirsch, P. (1998): Dynamic Task Migration in Cellular Multiprocessor ArraysProceedings 2nd IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN'98), (206-209)
  • T. Adler, J. Scheible (1998): An Interactive Router for Analog IC DesignDATE 98: Design, Automation and Test in Europe
  • Weide, K.; Keck, C.; Yu, X. (1998): Influence of the material properties on the thermal behavior of a packageProc. SPIE 3510, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV, pp. 112-121
    DOI: 10.1117/12.324388
  • Wittenburg, P.; Hinrichs, W.; Kneip, J.; Ohmacht, M.; Berekovic, M.; Lieske, H.; Kloos, H.; Pirsch, P. (1998): Realization of a Programmable Parallel DSP for High Performance Image Processing ApplicationsDesign Automation Conference (DAC) 1998, (56-61)
  • Yu, X.; Weide, K. (1998): Investigations of mechanical stress migration in an aluminum test structureAdv. Met. Conf. (AMC 1998), Proc. Conf. Sandhu, G.S.; Koerner, H.; et.al., Warrendale, PA, USA, USA: Mater. Res. Soc, pp. 469-473
  • Yu, X; Weide, K. (1998): Finite Element Analysis of Thermal-Mechanical Stress induced Failure in InterconnectsMRS Boston December 1998, MRS Proc.1999, pp 269-274.
  • Berekovic, M.; Kloos, H.; Pirsch, P. (1997): Hardware Realization of a JAVA Virtual Machine for High Performance Multimedia Applications1997 IEEE Workshop on Signal Processing Systems (SiPS '97), M. K. Ibrahim, P. Pirsch, J. McCanny, (479-488)
  • Blume, H.; Amer, A.; Schröder, H. (1997): Vectorbased Postprocessing of MPEG Signals for Digital TV ReceiversProceedings of the IS&T/SPIE Symposium on Electronic Imaging
  • Blume, H.; Franzen, O.; Schmidt, M. (1997): Optimierung von Algorithmen der Videosignalverarbeitung durch EvolutionsstrategienTagungsband der ITG Fachtagung Multimedia, (215-220)
  • Blume, H.; Franzen, O.; Schmidt, M. (1997): Optimizing Video Signal Processing Algorithms by Evolution StrategiesProceedings of the 5th FUZZY Days, (547-548)
  • D. Behrens, R. Tolkiehn, E. Barke (1997): Design Driven PartitioningASP-DAC 97: 2nd Asia and South Pacific Design Automation Conference
  • Do, T.; Kropp, H.; Schwiegershausen, M.; Pirsch, P. (1997): Implementation of Pipelined Multipliers on Xlinix FPGAsProceedings of the 7th International Workshop Field-Programmable Logic and Applications (FPL '97), W. Luk, P. Y. K. Cheung, M. Glesner, Springer Verlag (51-60)
  • Herrmann, K.; Hilgenstock, J.; Pirsch, P. (1997): Architecture of a Multiprocessor System with Embedded DRAM for Large Area IntegrationProceedings of the International Conference on Innovative Systems in Silicon 1997, (274-281)
  • Hilgenstock, J.; Herrmann, K.; Pirsch, P. (1997): A Parallel DSP Architecture for Object-based Video Signal ProcessingIS&T/SPIE Conference: Multimedia Hardware Architectures, SPIE, 3021, (78-87)
  • Hilgenstock, J.; Herrmann, K.; Wallenberg, v.; Pirsch, P. (1997): Implementation of a Multiprocessor System for Real-Time Video Signal ProcessingProceedings of the International Conference on Electronics, Circuits and Systems (ICECS) 1997, (1423-1426)
  • J. Abke (1997): Vergleich von Fehleremulation & -simulation in einer industriellen AnwendungMUG: Mentor Graphics Users Group Conference
  • J. Stohmann, Barke E.; (1997): A Universal Pezaris Array Multiplier Generator for SRAM-Based FPGAsICCD 97: International Conference on Computer Design, (489-495)
  • J. Stohmann, E. Barke (1997): An Universal Booth-Multiplier Generator for SRAM-Based FPGAsFPGA 97: 5th International Symposium on Field-Programmable Gate Arrays
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  • Kneip, J.; Berekovic, M.; Pirsch, P. (1997): An Algorithm-Hardware-System Approach to VLIW Multimedia ProcessorsProceedings of the 1997 IEEE Workshop on Multimedia Signal Processing, Y. Wang, A. R. Reibmann, B. H. Juang, T. Chen, S. Y. Kung, (433-438)
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  • M. Klemme, E. Barke (1997): Modellierung und Simulation von Substratkoppelungen in bipolaren integrierten SchaltungenMikroelektronik 97, (61-66)
  • M. Ringe, T. Lindenkreuz, E. Barke (1997): Das allgemeine Problem der falscher Pfade: Ein Überblick4. SICAN Herbsttagung, (227-232)
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  • Pirsch, P.; Stolberg, J. (1997): Architectural Approaches for Video CompressionProceedings of the 1997 International Conference on Application Specific Systems, Architectures, and Processors (ASAP), (176-185)
  • R. Sedaghat (1997): Fehlersimulation mit Logikemulationsystemen4. SICAN Herbsttagung, (221-225)
  • R. Sedaghat-Maman, E. Barke (1997): A New Approach to Fault EmulationRSP 97: 8th IEEE International Conference on Rapid Systems Prototyping, (173-179)
  • Reuter, C.; Schwiegershausen, M.; Pirsch, P. (1997): Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary AlgorithmsProceedings of the 1997 International Conference on Application Specific Systems, Architectures, and Processors (ASAP), (294-303)
  • T. Adler, J. Scheible (1997): A Global Router for Analog IC DesignMUG: Mentor Graphics Users Group Conference
  • Wittenburg, P.; Ohmacht, M.; Kneip, J.; Hinrichs, W.; Pirsch, P. (1997): HiPAR-DSP: A Parallel VLIW RISC Processor for Real Time Image Processing ApplicationsProceedings of the International Conference on Algorithms And Architectures for Parallel Processing (ICA3PP) 1997, (155-162)
  • Yu, X.; Weide, K. (1997): Investigations of mechanical Stress and Electromigration in an aluminum meander structureProc. Conf. SPIE Vol. 3216, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III, Austin, pp. 160-166
  • Blume, H. (1996): Vectorbased Nonlinear Upconversion Applying Center Weighted Medians1996 IS&T/SPIE Symposium on Electronic Imaging, 2662, (142-153)
  • Blume, H.; Appelhans, P.; Bussmann, C.; Schröder, H. (1996): Upconversion MPEG übertragener BildsignaleVortragsband zur FKTG Jahrestagung, (555-572)
  • Blume, H.; Schröder, H. (1996): Image Format Conversion - Algorithms, Architectures, ApplicationsProc. of the IEEE ProRISC Workshop on Circuits, Systems and Signal Processing, (19-37)
  • C. Borchers (1996): Automatische Generierung symbolischer Verhaltensmodelle für nichtlineare AnalogschaltungenAnalog 96: 4. GMM/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (25+26)
  • C. Borchers (1996): Symbol Behavioral Modelling of Nonlinear Analog CircuitsSMACD 96: 4th International Conference on Symbolic Methods and Applications to Circuit Design
  • C. Borchers (1996): Automatische Generierung symbolischer Verhaltensmodelle nichtlineare Analogschaltungen3. SICAN Herbsttagung, (79-86)
  • C. Borchers, L. Hedrich, E. Barke (1996): Equation-Based Behavioral Model Generation for Nonlinear Analog CircuitsDAC 96: 33rd Design Automation Conference, (236-239)
  • C. Borchers, R. Sommer, E. Hennig (1996): On The Symbolic Calculation of Nonlinear CircuitsISCAS 96: Int. Symposium on Circuits and Systems, (719-722)
  • D. Behrens, K. Harbich, E. Barke (1996): Hierarchical PartitioningICCAD 96: Int. Conference on Comuter Aided Design, (470-477)
  • D. Behrens, K. Harbich, E. Barke (1996): Circuit Partitioning Using High-Level Design InformationIDPT 96: 2nd World Conference on Integrated Design & Process Technology, (256-266)
  • F. Scherber, E. Barke, W. Meier (1996): PALACE: A Parallel and Hierarchical Layout Analyzer and Circuit ExtractorED&TC 96: European Design and Test Conference, (357-361)
  • Herrmann, K.; Gaedke, K.; Hilgenstock, J.; Pirsch, P. (1996): Design of a Development System for Multimedia Applications based on a Single Chip Multiprocessor ArrayICECS, (1151-1154)
  • Herrmann, K.; Gaedke, K.; Jeschke, H.; Pirsch, P. (1996): A Monolithic Low Power Video Signal Processor for Multimedia ApplicationsInternational Conference on Consumers Electronics (ICCE), (176-177)
  • Herrmann, K.; Hilgenstock, J.; Gaedke, K.; Jeschke, H.; Pirsch, P. (1996): A Programmable Processing Element Dedicated as Building Block for a Large Area Integrated Multiprocessor SystemIEEE International Conference: Innovative Systems in Silicon, (98-103)
  • J. Stohmann, E. Barke (1996): An Universal CLA Adder Generator for SRAM-Based FPGAsFPL 96: 6th Int. Workshop on Field-Programmable Logic and Applications, (44-54)
  • J. Stohmann, K. Harbich, D. Behrens (1996): Ein neuer optimierter Designflow for Rapid-Prototyping-Systeme3. SICAN Herbstagung, (15-18)
  • Kneip, J.; Ohmacht, M.; Wittenburg, P.; Pirsch, P. (1996): Parallel Implementations of Medium Level Algorithms on a Monolithic ASIMD MultiprocessorProceedings of ISCAS '96, 4, IEEE Press (316-319)
  • Kneip, J.; Pirsch, P. (1996): Memory Efficient List Based Hough Transform for Programmable Digital Signal Processors with On-Chip CachesProc. 1996 IEEE Digital Signal Processing Workshop, (191-194)
  • Kneip, J.; Pirsch, P. (1996): An Object Based Data Cache with Conflict Free Access as Shared Memory of a Parallel DSPProc. 1996 IEEE Intern. Workshop on VLSI Signal Processing IX, (25-34)
  • Kneip, J.; Wittenburg, P.; Hinrichs, W.; Berekovic, M.; Pirsch, P. (1996): Der HiPAR-DSP: Ein programmierbarer monolithischer Parallelprozessor für die EchtzeitbildverarbeitungIGT-Fachbericht, VDE-Verlag GmbH (55-60)
  • Kropp, H.; Schwiegershausen, M.; Pirsch, P. (1996): A CAD Tool for the Optimization of Video Signal Processor ArchitecturesProceedings of ICASSP96, IEEE Computer Society Press (1244-1247)
  • Otterstedt, J.; Gaedke, K.; Herrmann, K.; Kuboschek, M.; Schröder, U.; Werner, A. (1996): A 16.6 cm2 Monolithic Multiprocessor System Integrating 9 Video Signal-Pocessing ElementsInternational Solid State Circuit Conference, (306-307, 464)
  • R. Kattner, F. Scherber, L. Beste, C. Müller-Schloer, E. Barke (1996): Speeding Up Parallel Layout Verification by Simulation-Based Task SchedulingESS 96: 8th European Simulation Symposium
  • Schwiegershausen, M.; Kropp, H.; Pirsch, P. (1996): A System Level HW/SW-Partitioning and Optimization ToolEuropean Design Automation Conference (EDAC), (120-125)
  • Winter, M.; Schwiegershausen, M.; Pirsch, P. (1996): Ein CAD-Tool zur Optimierung heterogen aufgebauter Multiprozessoren3. SICAN Herbsttagung, (19-24)
  • Blume, H.; Amer, A. (1995): Parallel Predictive Motion Estimation using Object Recognition MethodsProceedings of the European Workshop and Exhibition on Image Format Conversion and Transcoding
  • Blume, H.; Lück, M. (1995): Bildformatkonversion für Multimedia Displays - Anwendungen, Displayeigenschaften, KonversionsverfahrenBeitrag zur ITG-Fachtagung Multimedia im Rahmen des 6. Dortmunder Fernsehseminars, 136, (49-58)
  • Gaedke, K.; Herrmann, K.; Jeschke, H.; Pirsch, P. (1995): AxPe640V - Ein hochintegrierter Videosignalprozessor für die Echtzeit-VideocodierungGME-Fachbericht Mikroelektronik, 15, VDE-Verlag (69-74)
  • Herrmann, K.; Gaedke, K.; Pirsch, P. (1995): Design eines Entwicklungssystems für Multi-Media-Anwendungen auf Basis des programmierbaren Videosignalprozessors AxPe640V6. Dortmunder Fernsehseminar, ITG-Fachbericht, (136), VDE-Verlag (151-156)
  • Kneip, J.; Wittenburg, P.; Berekovic, M.; Rönner, K.; Pirsch, P. (1995): An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal ProcessorVLSI Signal Processing VIII, (41-51)
  • L. Hedrich, E. Barke (1995): A Formal Approach to Nonlinear Analog Circuit VerificationICCAD 95: Int. Conference on Computer Aided Design, (123-127)
  • L. Hedrich, E. Barke (1995): Ein Verfahren zur Verifikation nichtlinearer analoger Schaltungen2. ITG-Diskussionssitzung Neue Anwendungen theoretischer Konzepte in der Elektrotechnik, (145-147)
  • Lück, M.; Blume, H. (1995): Konversionstechniken für die zeitsequentielle stereoskopische Bildwiedergabe40. Internationales Wissenschaftliches Kolloqium, Ilmenau, (60-65)
  • Pirsch, P.; Gehrke, W. (1995): VLSI Architectures for Video Signal ProcessingIEE Image Processing and its Applications, (6-10)
  • Pirsch, P.; Gehrke, W. (1995): VLSI Architectures for Video CompressionProceedings ISSSE '95, (49-54)
  • Pirsch, P.; Gehrke, W. (1995): VLSI Architectures for Video Signal ProcessingVisual Communications and Image Processing 1995, SPIE, 2501, (758-777)
  • Pirsch, P.; Kneip, J.; Rönner, K. (1995): Parallelization Resources of Image Processing Algorithms and their Mapping on a Programmable Parallel Videosignal ProcessorIEEE International Symposium on Circuits and Systems, (562-565)
  • Schröder, H.; Blume, H. (1995): Image Format Conversion - from Signal Theory to ApplicationsProceedings of the European Workshop and Exhibition on Image Format Conversion and Transcoding
  • Schwiegershausen, M.; Pirsch, P. (1995): A Formal Approach for the Optimization of Heterogeneous Multiprocessors for Complex Image Processing SchemesProceedings of EURO-DAC '95, IEEE Computer Society Press (8-13)
  • Schwiegershausen, M.; Pirsch, P. (1995): A System level Design Methodology for the Optimization of Heterogeneous MultiprocessorsProceedings of 8th International Symposium on System Synthesis, IEEE Computer Society Press (162-167)
  • Weide, K.; Ullmann, J. (1995): Temperature and Current Density Distributions in Via Structures with Inhomogeneous Step CoveragesProc. Conf. SPIE Vol. 2635, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis, Austin, pp. 145-155
  • Weide, K.; Yu, X.; Quintard, V. (1995): Simulation and Measurement of an Aluminum Meander StructureProc. 7th Int. Conf. Qual. Elec. Comp. & 6th Eur. Symp. Rel.Elec. Dev, pp. 241-246
  • Winzker, M.; Pirsch, P.; Reimers, J. (1995): Architecture and Memory Requirements for Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMsProc. of IEEE Intl. Symposium on Circuits and Systems (ISCAS), (609-612)
  • Blume, H.; Ivanov, K.; Schröder, H. (1994): Proscan - Konversion für Multimedia - Anwendungen - Systemkonzept und VLSI - ArchitekturenTagungsband zur 6. ITG-Fachtagung Mikroelektronik für die Informationstechnik, (109-113)
  • Blume, H.; Schwoerer, L.; Zygis, K. (1994): Subband Based Upconversion using Complementary Median FiltersProceedings of the 7 th Int. Congress on HDTV and Beyond
  • C. Arndt, C. Borchers (1994): Verhaltensmodellierung eines Autoradio-FM-Tuners3. GME/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden
  • C. Borchers, S. Lucke, E. Barke (1994): Integration der Monte-Carlo-Analyse in eine Schaltungsumgebung3. GI/ITG/GME-Fachtagung Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, (96-104)
  • Claeys, W.; Dilhaire, S.; Lewis, D.; Quintard, V.; Phan, T.; Fenech, A.; Hasse, W.; Weide, K. (1994): Optical Current Density Probing at Interfaces in Bondings and Solder Joints: Investigation of Ageing Mechanisms
  • D. Behrens, E. Kiel (1994): Logikemulation mit FPGAs - DerWeg aus der Verifikationskrise ?GI/ITG-Workshop Anwenderprogrammierbare Schaltungen -Architekturen, Anwendungen, Werkzeuge
  • Gehrke, W.; Hoffer, R.; Pirsch, P. (1994): A Hierarchical Multiprocessor Architecture based on Heterogeneous Processors for Video Coding ApplicationsInternational Conference on Acoustics, Speech and Signal Processing, (II 413-416)
  • Herrmann, K.; Seifert, M.; Gaedke, K.; Jeschke, H.; Pirsch, P. (1994): Architecture and VLSI Implementation of a RISC Core for a Monolithic Video Signal ProcessorVLSI Signal Processing VII, J. Rabaey, P. M. Chau, J. Eldon, IEEE (368-377)
  • Kneip, J.; Rönner, K.; Pirsch, P. (1994): A Single Chip Parallel Architecture for Image Processing ApplicationsSPIE - Visual Communications and Image Processing '94, 2308, (1753-1764)
  • Kneip, J.; Rönner, K.; Pirsch, P. (1994): A Data Path Array with Shared Memory as Core of a High Performance DSPThe International Conference on Application Specific Array Processors, IEEE Computer Society Press (271-282)
  • M. Gibron (1994): Eine Entwicklungsumgebung zur Synthese von Simulationsmodellen analoger Schaltungen auf der Basis einer objektorientierten Datenbank3. GME/ITG-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden
  • Pirsch, P.; Gehrke, W. (1994): VLSI-Realisierungen für MPEG-VideoMikroelektronik für die Informationstechnik, ITG-Fachbericht 127, VDE-Verlag GmbH (143-152)
  • Pirsch, P.; Gehrke, W.; Gaedke, K.; Herrmann, K. (1994): A parallel VLSI Architecture for Object Based Analysis-Synthesis Video CodingIEEE Workshop on Visual Signal Processing and Communications, (136-141)
  • Pirsch, P.; Gehrke, W.; Gaedke, K.; Herrmann, K. (1994): A Parallel VLSI Architecture for Object-based Analysis-Synthesis CodingIEEE Workshop Visual Signal Processing and Image Communications, (136-141)
  • Schwiegershausen, M.; Pirsch, P. (1994): Optimization of Heterogeneous Multiprocessors for Complex Image Processing ApplicationsProceedings of the IFIP Workshop on Logic and Architecture Synthesis, (251-260)
  • Schwiegershausen, M.; Schönfeld, M.; Pirsch, P. (1994): Abbildung komplexer Bildverarbeitungsverfahren auf heterogene MultiprozessorsystemeRechnergestützter Entwurf und Architektur mikroelektronischer Systeme, Vorträge der 3. GI/ITG/GME-Fachtagung Oberwiesenthal, D. Monjau, (106-115)
  • Weide, K.; Hasse, W. (1994): Prediction of the Failure Locations in Multilevel Metallizations due to Triple Points, Current Crowding an Temperature Gradientsroc. 11. International IEEE VLSI Multilevel Interconnection Conference, Pages 536-538.
  • Weide, K.; Hasse, W. (1994): Failure Locations in Different Via Structures due to ElectromigrationProc. Int. Conf. 5th Eur. Symp. Rel. Elec. Dev., pp. 365-369
  • Weide, K.; Hasse, W. (1994): Electromigration Resistance of an ULSI Copper Via Structure Compared with a Tungsten and an Aluminum-Plug Via Structure with Barrier LayersMRS Proc. of the Advanced Metallization for ULSI Applications Conf. p. 397
  • Winzker, M. (1994): Influence of Statistical Properties of Video Signals on the Power Dissipation of CMOS CircuitsPATMOS International Workshop on Power and Timing Modeling, Optimization and Simulation, (106-113)
  • Blume, H. (1993): Bewegungsschätzung in Videosignalen mit örtlich-zeitlichen PrädiktorenVortragsband zum 5. Dortmunder Fernsehseminar, 0393, (220-231)
  • C. Borchers, B. Ludwig, E. Barke (1993): Reduktion parasitärer RC-Netzwerke in höchstintegrierten Schaltungen6. E.I.S.- Workshop, (361-368)
  • C. Borchers, J. Wagner, E. Barke (1993): Verhaltensmodell und Simulation eines Radio-Koinzidenzdemodulator2. GME/ITG Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, (114-118)
  • Gaedke, K.; Franzen, J.; Pirsch, P. (1993): A Fault-Tolerant DCT-Architecture based on Distributed ArithmeticIEEE International Symposium on Circuits and Systems, (1583-1586)
  • Gehrke, W.; Hoffer, R.; Pirsch, P. (1993): Hierarchische Multiprozessorarchitekturen für die Echtzeitvideocodierung5. Dortmunder Fernsehseminar, (188-195)
  • Hoffer, R.; Gehrke, W.; Pirsch, P. (1993): Heterogenous multiprocessor architecture for video coding applicationsVideo Communications and PACS for Medical Applications, Proc. of SPIE, 1977, (417-424)
  • Pirsch, P.; Gehrke, W.; Hoffer, R. (1993): A Hierarchical Multiprocessor Architecture for Video Coding ApplicationsInternational Symposium on Circuits and Systems, (1759-1753)
  • Pirsch, P.; Gehrke, W.; Hoffer, R. (1993): Parallel VLSI Implementation of Video Coding AlgorithmsIEEE Workshop on Visual Signal Processing and Communications, (335-338)
  • Schönfeld, J.; Pirsch, P. (1993): Single Board Image Processing Unit for Vehicle GuidanceInternational Conference on VLSI, (4.2.1-10)
  • Schönfeld, J.; Pirsch, P. (1993): Image Processing Board for Real-Time Extraction of Line Symbols from Video SequencesVLSI Signal Processing VI, L. D. J. Eggermont, P. Dewilde, E. Deprettere, J. van Meerbergen, IEEE (30-38)
  • Schönfeld, J.; Pirsch, P. (1993): Compact Hardware Realization for Hough Based Extraction of Line Segments in Image Sequences for Vehicle GuidanceICASSP, (I-397-401)
  • Weide, K.; Hasse, W. (1993): 3-Dimensional FEM-Simulations and Measurement of Via StructuresProc. 6th Int. Conf. Qual. Elec. Comp. & 4th Eur. Symp. Rel. Elec. Dev., pp. 313-317
  • Winzker, M.; Grüger, K.; Pirsch, P. (1993): Schaltungsstrukturen für die Realisierung integrierter HDTV-TeilbandfilterGME-Fachbericht 11 Mikroelektronik, Vorträge der GME-Fachtagung, Dresden, VDE-Verlag GmbH (345-350)
  • Gaedke, K.; Jeschke, H.; Wehberg, T. (1992): Architecture and Performance of a Large Area Multiprocessor System for Real-Time Video ProcessingProc. of Int. Conf. on Wafer Scale Integration (WSI), IEEE Comp. Soc. Press (19-27)
  • Grüger, K.; Winzker, M.; Gehrke, W.; Pirsch, P. (1992): VLSI Realization of 2D HDTV Subband Filterbanks with On-Chip Line Memories and FIFOsProc. of ESSCIRC '92, 18th European Solid State Circuits Conference, (319-322)
  • Hasse, W.; Depta, D.; Weide, K. (1992): Thermal-Electrical Characterisation of SWEAT-StructuresProc. Int. Conf. 3th Eur. Symp. Rel. Elec. Dev, Schwäbisch-Gemünd, pp. 371-375
  • Jeschke, H.; Gaedke, K.; Pirsch, P. (1992): A VLSI Based Multiprocessor Architecture for Video Signal ProcessingProc. of IEEE Int. Symposium on Circuits and Systems (ISCAS), (1685-1688)
  • Pirsch, P. (1992): VLSI Architectures and Implementations for Video and HDTVConference on Video/HDTV Signal Processing, University of California, Santa Barbara
  • Pirsch, P. (1992): VLSI Architectures for Digital Video CodingIEEE Workshop on Visual Signal Processing and Communications, S. A. Rajala, K. H. Tzou, IEEE (1-8)
  • Pirsch, P.; Grüger, K.; Winzker, M. (1992): VLSI Architectures of Two-Dimensional Filters for HDTV CodingProc. of IEEE Int. Symposium on Circuits and Systems (ISCAS), 4, IEEE (1648-1651)
  • Schönfeld, M.; Schwiegershausen, M.; Pirsch, P. (1992): Synthese von Registerschaltungen für den Datentransfer mit systolischen ArraysITG-Fachbericht 122: Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, VDE-Verlag GmbH (147-156)
  • Weide, K.; Hasse, W. (1992): 3-dimensional Simulations of Temperature and Current Density Distribution in a Via Structure
  • Wilberg, J.; Schöbinger, M.; Pirsch, P. (1992): Hierarchical Multiprocessor System for Video Signal ProcessingProc. of SPIE Visual Communications and Image Processing, 1818, (1076-1087)
  • Winzker, M.; Grüger, K.; Gehrke, W.; Pirsch, P. (1992): Architecture and Realization of HDTV Subband FiltersIEEE workshop on Visual Signal Processing and Communications, Raleigh, NC, S. A. Rajala, K. H. Tzou, IEEE (21-24)
  • Winzker, M.; Grüger, K.; Pirsch, P. (1992): VLSI Architecture of Filterbanks for an HDTV Subband Coder with 140 Mbit/sForth Int. Workshop on HDTV and beyond, Elsevier (165-172)
  • Franzen, J. (1991): A Design Method for On-Line Reconfigurable Array ProcessorsProc. of Int. Conf. on Application-Specific Array Processors (ASAP), (21-35387-401)
  • Gaedke, K.; Jeschke, H.; Wehberg, T. (1991): Architecture and Application of a SIMD Based Processing Element for Real-Time Image ProcessingProc. of the ISMM Intl. Workshop Parallel Computing, Trani, Italy, (382-385)
  • Hecht, V.; Rönner, K.; Pirsch, P. (1991): A Defect Tolerant Systolic Array Implementation for Real Time Image ProcessingProc. of Int. Conf. on Application-Specific Array Processors (ASAP), (25-39)
  • Hecht, V.; Rönner, K.; Pirsch, P. (1991): An Advanced Programmable 2D-Convolution Chip for Real Time Image ProcessingProc. of IEEE Intl. Symposium on Circuits and Systems (ISCAS), 4, (1897-1900)
  • Jeschke, H.; Volkers, H.; Wehberg, T. (1991): A Multiprocessor System for Real-Time Image Processing Based on a MIMD ArchitectureFrom Pixels to Features II, H. Burkhardt, J. C. Simon, Elsevier (173-185)
  • Komarek, T. (1991): Funktionsorientiertes System für den Blockmatching-AlgorithmusTagungsband 2. CADMOS Diskussionssitzung, (254-272)
  • Münzner, A.; Hemme, G. (1991): Converting Combinational Circuits into Pipelined Data PathsProc. of ICCAD, IEEE Computer Society Press (368-371)
  • Pirsch, P. (1991): VLSI Architectures and Implementations for Digital Video CodingProc. of Congress: Innovative Developments and Applications of Microelectronics and Information Technologie, E. Raubold, VDE-Verlag GmbH (439-445)
  • Pirsch, P.; Jeschke, H. (1991): A MIMD multiprocessor system for real-time image processingProc. of the SPIE / SPSE Symposium on Electronic Imaging: Science & Technology, 1452, (544-555)
  • Rönner, K.; Hecht, V.; Pirsch, P. (1991): Defekttoleranter systolischer Arrayprocessor für die zweidimensionale Faltung von BildsequenzenGME-Fachtagung Mikroelektronik, GME-Fachbericht 8, (95-100)
  • Schönfeld, M.; Pirsch, P.; Schwiegershausen, M. (1991): Synthesis of Intermediate Memories needed to handle the Data Supply to Processor ArraysFifth International ACM & IEEE Workshop on High-Level Synthesis, W. Rosenstiel, (21-28)
  • Schönfeld, M.; Schwiegershausen, M.; Pirsch, P. (1991): Synthesis of Intermediate Memories needed for the Data Supply to Processor ArraysProc. of VLSI, Halaas, Denyer, (7.3.1-7.3.10)
  • Vehlies, U. (1991): Mapping Different Node Types of Dependence Graphs into the same Processing ElementProc. of Int. Conf. on Application-Specific Array Processors (ASAP), (72-86)
  • Vehlies, U. (1991): The Derivation of Dependence Graphs from PASCAL Programs for Array Processor DesignProc. of Algorithms and Parallel VLSI Architectures II, Bonas, France, Elsevier (371-376)
  • Vehlies, U.; Crimi, A. (1991): A Compiler for Generating Dependence Graphs of DSP-AlgorithmsAlgorithms and Parallel VLSI Architectures, E. F. Deprettere, Elsevier (319-328)
  • Vehlies, U.; Seiler, U. (1991): The Application of Compiler Techniques in Systolic Array DesignProc. of IEEE Int. Symposium on Circuits and Systems (ISCAS), (240-243)
  • Weide, K.; Bergmann, J.; Hasse, W.; Depta, D. (1991): Simulations of Current and Potential Distribution in a Via Structure and a Laser Formed ContactProc. 5th Int. Conf. Qual. Elec. Comp. & 2nd Eur. Symp. Rel. Elec. Dev., pp. 907-913
  • Franzen, J. (1990): Design of Run-Time Fault-Tolerant Arrays of Self-Checking Processing ElementsProc. of Int. Conf. on Application Specific Array Processors, (168-179)
  • Grüger, K.; Pirsch, P. (1990): VLSI-Komponenten eines 140Mbit/s-HDTV-Codecs14. FKTG-Jahrestagung, (74-75)
  • Grüger, K.; Pirsch, P.; Kraus, J.; Reimers, J. (1990): VLSI components for a 560 Mbit/s HDTV codecProc. SPIE Conf. Visual Communications and Image Processing, (388-397)
  • Jeschke, H.; Wehberg, T.; Volkers, H. (1990): A MIMD Based Multiprocessor Architecture for Real-Time Image Processing Suitable for a Monolithic Redundant RealizationProc. of IEEE Int. Conf. on Wafer Scale Integration, IEEE Comp. Soc. Press (40-46)
  • Komarek, T.; Pirsch, P. (1990): VLSI Architectures for hierarchical Block Matching AlgorithmsProc. IEEE, Int. Symposium on Circuits and Systems, (45-48)
  • Münzner, A. (1990): Building Block Generation considering the Inherent Hierarchy of Arithmetic OperationsProc. of IFIP Working Conference on Logic and Architecture Synthesis, (277-286)
  • Pirsch, P.; Wehberg, T. (1990): VLSI Architecture of a Programmable Real-Time Video Signal ProcessorProc. SPIE Digital Image Processing and Visual Communications Technologies in the Earth and Athmospheric Sciences, (2-12)
  • Rönner, K.; Hecht, V.; Pirsch, P. (1990): Defect-Tolerant Implementation of a Systolic Array for Two-Dimensional ConvolutionProc. of IEEE Intl. Conf. on Wafer Scale Integration, IEEE Comp. Soc. Press (19-25)
  • Schönfeld, J.; Pirsch, P. (1990): VLSI Implementation for Real Time Processing of Straight Line ExtractionFrom Pixels to Features II, J. C. Simon, Elsevier (395-406)
  • Volkers, H.; Jeschke, H.; Wehberg, T. (1990): Cache Memory Design For The Data Transport To Array ProcessorsProc. of IEEE Int. Symposium on Circuits and Systems, (49-52)
  • Grüger, K.; Pirsch, P. (1989): Architecture of a 560 Mbit/s DPCM-HDTV-CodecProc. Third Int. Workshop on HDTV, II
  • Hecht, V. (1989): Hardware Supplements in Bit-Serial Systolic Arrays for Processing of Border-Pixels in 2-Dimensional Image TransformationsIFIP Workshop on Parallel Architectures on Silicon, (398-412)
  • Komarek, T.; Pirsch, P. (1989): VLSI architectures for block matching algorithmsFirst ESA Workshop on Digital Signal Processing Techniques applied to Space Applications
  • Komarek, T.; Pirsch, P. (1989): VLSI Architectures for Block Matching AlgorithmsProc. IEEE Int. Conf on Acoustics, Speech & Signal Processing (ICASSP), (2457-2460)
  • Komarek, T.; Pirsch, P. (1989): VLSI Architectures for Hierarchical Block Matching AlgorithmsIFIP Workshop on Parallel Architectures on Silicon, (168-181)
  • Münzner, A.; Pirsch, P. (1989): BADGE - Building Block Adviser and GeneratorProc. of IEEE Int. Symp. on Circuits and Systems, 3, (1887-1890)
  • Münzner, A.; Pirsch, P. (1989): BADGE: Ein Programm zur Buildingblock-GenerierungITG-Fachtagung Mikroelektronik für die Informationstechnik, ITG-Fachbericht 110, (35-40)
  • Pirsch, P.; Schönfeld, J. (1989): VLSI realization of low level image processing unitsProc. of the PROMETHEUS Workshop, (246-253)
  • Wehberg, T.; Volkers, H.; Jeschke, H. (1989): Architektur eines programmierbaren, digitalen Echtzeit-VideosignalprozessorsITG-Fachtagung Mikroelektronik für die Informationstechnik, ITG-Fachbericht 110, (157-162)
  • Pirsch, P. (1988): VLSI-Realisierungen für die VideocodierungITG-Fachtagung Mikroelektronik für die Informationstechnik, ITG Fachbericht 103, (119-126)
  • Pirsch, P.; Komarek, T. (1988): VLSI Architectures for Block Matching AlgorithmsProc. SPIE Conf. Visual Communications and Image Processing III, (882-891)
  • Wehberg, T.; Volkers, H. (1988): Architecture of a programmable real-time processor for digital video signals adapted to motion estimation algorithmsProc. SPIE Conf on Visual Communications and Image Processing III, 1001, SPIE (908-916)
  • Pirsch, P. (1987): Systemarchitektur - Strategien für die schnelle digitale SignalverarbeitungTagungsband der Professorenkonferenz 1987 der DBP, (137-148)
  • Pirsch, P. (1987): VLSI DPCM Codecs for Video Signal CodingPicture Coding Symposium
  • Pirsch, P.; Heiß, R. (1987): Compact video codec for broadband communicationsConference Record TV Symposium Montreux, (206-219)
  • Pirsch, P.; Kemper, A. (1987): HALMA: A program for logic synthesis considering application specific constraintsInternational Workshop on Logic Synthesis
  • Pirsch, P.; Micke, T.; Bao, H. (1987): Digital Filters for Video Codecs with Oversampled ADC and DACInternational Symposium on Circuits and Systems, (217-220)
  • Pirsch, P. (1986): Architektur und Schaltkreistechnik von CMOS ICs für die Codierung von VideosignalenNTG-Fachbericht Mikroelektronik für die Informationstechnik, (213-222)
  • Pirsch, P. (1985): Coding of TV signals for broadband communicationsConference Record TV Symposium, (599-609)
  • Drews, S.; Pirsch, P.; Schaper, K. (1984): Circuit Technique for VLSI Design of a Video CodecICC'84 Conference Record, (250-255)
  • Pirsch, P. (1983): Codes mit minimaler Wahrscheinlichkeit für PufferspeicherüberlaufNTG-Fachbericht 84, (219-225)
  • Pirsch, P.; Bierling, M. (1983): Changing the Sampling Rate of Video Signals by Rational FactorsConference Record EUSIPCO'83, (171-174)
  • Pirsch, P.; Netravali, N. (1982): Hierarchical Transmission of Multilevel Dithered ImagesInternational Conference on Electronic Image Processing, (16-21)
  • Pirsch, P. (1981): Adaptive Intra-Interframe PrädiktorenSummaries of the 4. Aachener Kolloquium, (163-166)
  • Pirsch, P. (1981): Stability Conditions of DPCM CodersPicture Coding Symposium
  • Pirsch, P. (1981): Adaptive Intra-Interframe DPCM CoderPicture Coding Symposium
  • Pirsch, P. (1980): A New Predictor Design for DPCM Coding of TV SignalsICC'80 Conference Record, (31.2.1-31.2.5)
  • Pirsch, P. (1979): Design of DPCM Quantizers for Video Signals Using Subjective TestsPicture Coding Symposium
  • Pirsch, P. (1979): A New Predictor Design for DPCM CodersPicture Coding Symposium
  • Pirsch, P. (1977): Block Coding of Color Video SignalsNTC Conference Record, (10:5.1-10:5.5)

Journalbeiträge

  • Arndt O. J., Lüders M., Riggers C., Blume H. (2020): Multicore Performance Prediction with MPET - Using Scalability Characteristics for Statistical Cross-Architecture PredictionJournal of Signal Processing Systems, Springer
    DOI: 10.1007/s11265-020-01563-w
  • Giesemann, F.; Gerlach, L.; Payá-Vayá, G.; (2020): Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW CompilersJournal of Signal Processing Systems, (), 1-24
    DOI: 10.1007/s11265-019-01493-2
  • Marc Porr, Daniel Marquard, Nils Stanislawski, Jonas Austerjost, Mario Russo, Simon Bungers, Christoph Klimmt, Thomas Scheper, Sascha Beutel, Patrick Lindner (2019): smartLAB – Interaktives Arbeiten in digitalisierter LaborumgebungChemie Ingenieur Technik - Volume 91, Issue 3 - Special Issue: Digitalisierung in Forschung und Entwicklung
    DOI: 10.1002/cite.201800090
  • Weißbrich, M.; García-Ortiz, A.; Payá-Vayá, G. (2019): Comparing Vertical and Horizontal SIMD Vector Processor Architectures for Accelerated Image Feature ExtractionJournal of Systems Architecture
    DOI: 10.1016/j.sysarc.2019.101647
  • Weißbrich, M.; Gerlach, L.; Blume, H.; Najafi, A.; García-Ortiz, A.; Payá-Vayá, G. (2019): FLINT+: A Runtime-Configurable Emulation-Based Stochastic Timing Analysis FrameworkIntegration, the VLSI Journal
    DOI: 10.1016/j.vlsi.2019.01.002
  • Castro Martinez, A.M.; Gerlach, L.; Payá-Vayá, G.; Hermansky, H.; Ooster, J.; Meyer, B.T. (2018): DNN-based performance measures for predicting error rates in automatic speech recognition and optimizing hearing aid parametersSpeech Communication
    DOI: 10.1016/j.specom.2018.11.006
  • Chatterjee, A.; Bai, T.; Edler, F.; Tegenkamp, C.; Weide-Zaage, K.; Pfnür, H. (2018): Electromigration and morphological changes in Ag nanostructuresJ. Phys.: Condens. Matter, Vol. 30, No.9
    DOI: 10.1088/1361-648X/aaa80a
  • Mentzer, N.; Mahr, J.; Payá-Vayá, G.; Blume, H. (2018): Online Stereo Camera Calibration for Automotive Vision based on HW-accelerated A-KAZE-feature ExtractionJournal of Systems Architecture (in press)
    DOI: 10.1016/j.sysarc.2018.11.003
  • Najafi, A.; Weißbrich, M.; Payá Vayá, G.; García-Ortiz, A. (2018): Coherent Design of Hybrid Approximate Adders: Unified Design Framework and MetricsIEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol.8, Issue 4, pp. 736-745
    DOI: 10.1109/JETCAS.2018.2833284
  • Seidel, A.; Wicht, B. (2018): Drei Stufen geben SicherheitDesign & Elektronik : Know-How für Entwickler
    ISSN: 0933-8667
  • Zivkovic, C.; C. Grimm, C.; Olbrich, M.; Scharf, O.; Barke, E. (2018): Hierarchical Verification of AMS Systems With Affine Arithmetic Decision DiagramsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1–12 Weitere Informationen
    DOI: 10.1109/TCAD.2018.2864238
  • Maschhoff, P.; Heene, S.; Lavrentieva, S.; Hentrop, T.; Leibold, C.; Wahalla, M.-N.; Stanislawski, N.; Blume, H.; Scheper, T.; Blume, C. (2017): An intelligent bioreactor system for the cultivation of a bioartificial vascular graftEngineering in Life Sciences Weitere Informationen
    DOI: 10.1002/elsc.201600138
  • Mohd Said, S.; Muhd Nordin, N. I.; Ramli, R.; Sabri, MFM.; Rahim, B. A.; Weide-Zaage, K. (2017): The Impact of FeSn2 Intermetallic in SAC Solder AlloyIntermetallics
  • Nolting, S.; Payá-Vayá, G.; Giesemann, F.; Blume, H.; Niemann, S.; Müller-Schloer, C. (2017): Dynamic Self-Reconfiguration of a MIPS-Based Soft-Core Processor ArchitectureJournal of Parallel and Distributed Computing Weitere Informationen
    DOI: 10.1016/j.jpdc.2017.09.013
  • Payá-Vayá, G.; Bartels, C.; Blume, H. (2017): Small footprint synthesizable temperature sensor for FPGA devicesJournal of Systems Architecture, Volume 76, p. 28–38 Weitere Informationen
    DOI: 10.1016/j.sysarc.2017.03.005
  • Probst, S.; Denicke, E.; Geck, B. (2017): In Situ Waveform Measurements within Doherty Power Amplifier under Operational ConditionsIEEE Transactions on Microwave Theory and Techniques Vol. 65, No. 6, pp. 2192 - 2200, June 2017
  • Weide-Zaage, K. (2017): Simulation of Packaging under Harsh Environment Conditions (Temperature, Pressure, Corrosion and Radiation)Microelectronics Reliability, Volume 76-77, September 2017
    DOI: 10.1016/j.microrel.2017.07.026
  • Weide-Zaage, K.; Payá-Vayá, G. (2017): COTS – Harsh Condition Effects Considerations from Technology to User LevelAdv. Sci. Technol. Eng. Syst. J. 2(3), 1592-1598 (2017)
    ISBN: ISSN: 2415-6698
  • Guédon-Gracia, A.; Frémont, H.; Plano, B.; Delétage, J.-Y.; Weide-Zaage, K. (2016): Effects of salt spray test on lead-free solder alloyMicroelectronics Reliability, Volume 64, September 2016, Pages 242-247
    DOI: 10.1016/j.microrel.2016.07.034
  • Hein, V.; Erstling, M.; Sekar Sethu, R.; Weide-Zaage, K.; Bai, T. (2016): Reliability Evaluation of Donut-Tungsten-Via as an Element of the Highly Robust MetallizationMicroelectronics Reliability, Volume 64, September 2016, Pages 259–265
    DOI: 10.1016/j.microrel.2016.07.136
  • Brückner, H. P.; Lesse, S.; Theimer, W.; Blume, H. (2015): Design space exploration of hardware platforms for interactive low latency movement sonificationJournal on Multimodal User Interfaces, pp. 1-11, Springer Berlin Heidelberg
    DOI: 10.1007/s12193-015-0199-y
  • Brückner, H.-P.; Lesse, S.; Theimer, W.; Blume, H. (2015): Design space exploration of hardware platforms for interactive low latency movement sonificationJournal on Multimodal User Interfaces
    DOI: 10.1007/s12193-015-0199-y
  • Meinshausen, L.; Frémont, H.; Weide-Zaage, K. (2015): Dynamical IMC-Growth CalculationMicroelectronics Reliability, Volume 55, Issues 9–10, August–September 2015, Pages 1832–1837
    DOI: 10.1016/j.microrel.2015.06.052
  • Mentzer, N.; Payá Vayá, G.; Blume, H. (2015): Analyzing the Performance-Hardware Trade-off of an ASIP-based SIFT Feature ExtractionJournal of Signal Processing Systems
    DOI: 10.1007/s11265-015-0986-4
  • Nordin, N. I. M.; Said, S. M.; Ramli, R.; Weide-Zaage, K.; Sabri, M. F. M.; Mamat, A.; Ibrahim, N. N. S.; Mainal, A.; Datta, R. S. (2015): Impact of aluminium addition on the corrosion behaviour of Sn–1.0Ag–0.5Cu lead-free solderRSC Advances, Issue 120
    DOI: 10.1039/C5RA18453C
  • Sabri, M. F. M.; Nordin,N. I. M.; Said, S. M.; Amin, N. A. A. M.; Arof, H.; Jauhari, I.; Ramli, R.; Weide-Zaage,K. (2015): Effect of thermal aging on the electrical resistivity of Fe-added SAC105 solder alloysMicroelectronics Reliability, Volume 55, Issues 9–10, August–September 2015, Pages 1882–1885
    DOI: 10.1016/j.microrel.2015.06.123
  • Schubert, E.; Meinl, F.; Kunert, M.; Menzel, W. (2015): Clustering of high Resolution Automotive Radar Detections and Subsequent Feature Extraction for Classification of Road Users 16th International Radar Symposium (IRS), 2015
    DOI: 10.1109/IRS.2015.7226315
  • Weide-Zaage, K.; Moujbani, A. (2015): Simulation of µ-Bump and TSV in 3D-IntegrationInternational Journal of Engineering Practical Research (IJEPR), Volume 4, Issue 1 (April 2015)
    DOI: ISSN Online: 2326-5922
    ISBN: ISSN Print: 2326-5914
  • Barke, M.; Kaergel, M.; Olbrich, M.; Schlichtmann, U. (2014): Robustness measurement of integrated circuits and its adaptation to aging effectsMicroelectronics Reliability (Volume 54, Issue 6-7)
    DOI: 10.1016/j.microrel.2014.01.012
  • Brückner, H.-P.; Krüger, B.; Blume, H. (2014): Reliable orientation estimation for mobile motion capturing in medical rehabilitation sessions based on inertial measurement unitsMicroelectronics Journal 45 (2014), pp. 1603-1611 Weitere Informationen
    DOI: 10.1016/j.mejo.2014.05.018
    ISBN: 0026-2692
  • Brückner, H.-P.; Krüger, B.; Blume, H. (2014): Reliable orientation estimation for mobile motion capturing in medical rehabilitation sessions based on inertial measurement unitsMicroelectronics Journal, Vol. 45, Issue 12, pp. 1603-1611
    DOI: 10.1016/j.mejo.2014.05.018
    ISBN: ISBN: 978-3-319-10947-3
  • Frémont, H.; Kludt, J.; Wade, M.; Weide-Zaage, K.; Bord-Majek, I.; Duchamp, G. (2014): Qualification procedure against moisture for embedded capacitorsMicroelectronics Reliability, Volume 54, Issues 9–10, Pages 2013–2016
    DOI: 10.1016/j.microrel.2014.07.117
  • Hein, V.; Kludt, J.; Weide-Zaage, K. (2014): Evaluation new Corner Stress Relief Structure Layout for high robust MetallizationMicroelectronics Reliability, Volume 54, Issues 9–10, Pages 1977–1981
    DOI: 10.1016/j.microrel.2014.07.039
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V.; Kovács, C. (2014): Degradation Behaviour in Upstream/ Downstream Via Test StructuresMicroelectronics Reliability, Volume 54, Issues 9–10, Pages 1724–1728
    DOI: 10.1016/j.microrel.2014.07.042
  • Kock, M.; Hesselbarth, S.; Pfitzner, M.; Blume, H. (2014): Hardware-Accelerated Design Space Exploration Framework for Communication SystemsAnalog Integrated Circuits and Signal Processing, March 2013, Volume 78, Issue 3, pp 557-571
    DOI: 10.1007/s10470-013-0127-6
  • Meinshausen, L.; Frémont, H.; Weide-Zaage, K.; Plano, B. (2014): Electro- and Thermomigration Induced Cu3Sn and Cu6Sn5 Formation in SnAg3.0Cu0.5 BumpsMicroelectronics Reliability, Volume 53, Issues 9–11, Pages 1575–1580
    DOI: 10.1016/j.microrel.2014.09.030
  • Rongen, R.; Roucou, R,; vd Wel, P.J.; Voogt, F.; Swartjes, F.; Weide-Zaage, K. (2014): Reliability of Wafer Level Chip Scale PackagesMicroelectronics Reliability, Volume 54, Issues 9–10, Pages 1988-1994
    DOI: 10.1016/j.microrel.2014.07.012
  • Weide-Zaage, K.; Schlobohm, J.; Rongen, R.T.H.; Voogt, F.C.; Roucou, R. (2014): Simulation and Measurement of the Flip Chip Solder Bumps with a Cu-plated plastic CoreMicroelectronics Reliability, Volume 54, Issues 6–7, Pages 1206–1211
    DOI: 10.1016/j.microrel.2014.02.021
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V. (2013): Dynamic simulation of octahedron slotted metal structuresMicroelectronics Reliability, Volume 53, Issues 9–11, Pages 1606–1610
    DOI: 10.1016/j.microrel.2013.07.059
  • Meinshausen, L.; Fremont, H.; Weide-Zaage, K.; Plano, B. (2013): Electro- and Thermomigration-induced IMC Formation in SnAg3.0Cu0.5 Solder Joints on Nickel Gold PadsMicroelectronics Reliability, Volume 53, Issues 9–11, Pages 1575–1580
    DOI: 10.1016/j.microrel.2013.07.038
  • Moujbani, A.; Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V.; Meinshausen, L. (2013): Dynamic Simulation of Migration Induced Failure Mechanism in Integrated Circuit InterconnectsMicroelectronics Reliability, Volume 53, Issues 9–11, Pages 1365–1369
    DOI: 10.1016/j.microrel.2013.07.097
  • Orlob, C.; Reinecke, T.; Denicke, E.; Geck, B.; Rolfes, I. (2013): Compact Unfocused Antenna Setup for X-Band Free-Space Dielectric Measurements based on Line-Network-Network Calibration MethodIEEE Transactions on Instrumentation and Measurement . Vol. 62, No. 7, pp. 1982-1989, July 2013
  • Ackermann, M.; Hein, V.; Weide-Zaage, K. (2012): A design for robust wide metal tracksMicroelectronics Reliability, Volume 52, Issues 9–10, Pages 2447–2451
    DOI: 10.1016/j.microrel.2012.07.012
  • Armbrecht, G.; Zietz, C.; Denicke, E.; Rolfes, I. (2012): Dielectric Tube Antennas for Industrial Radar Level GaugingIEEE Transactions on Antennas and Propagation, Vol. 60, No. 11, pp. 5083-5091, November 2012
  • Kludt, J.; Weide-Zaage, K.; Ackermann, M.; Hein, V. (2012): Simulation of the Influence of TiAl3 Layers on the Thermal-Electrical and Mechanical Behaviour of Al MetallizationsMicroelectronics Reliability, Vol. 52, No 9-10, Pages 1987–1992
    DOI: 10.1016/j.microrel.2012.06.129
  • Lange, C.; Kattelans, A.; Rohn, K.; Lüpke, M.; Brückner, H.-P.; Stadler, P. (2012): Die kinetische Untersuchung der Fußung, der Belastung des Hufes und des Abrollvorganges an den Vordergliedmaßen von Pferden im Schritt und im Trab auf dem Laufband mit dem HoofTM-System (Tekscan®)Pferdeheilkunde, 28(5), (538-547) Weitere Informationen
    ISBN: 0177-7726
  • Langemeyer, S.; Pirsch, P.; Blume, H. (2012): Using SDRAM Memories for High-Performance Accesses to Two-Dimensional Matrices Without TransposeInternational Journal of Parallel Programming, Springer (1-24)
    DOI: 10.1007/s10766-012-0225-6
    ISBN: 0885-7458
  • Meinshausen, L.; Fremont, H.; Weide-Zaage, K. (2012): Migration induced IMC formation in SAC305 solder joints on Cu, NiAu and NiP metal layersMicroelectronics Reliability, Volume 52, Issues 9–10, Pages 1827–1832
    DOI: 10.1016/j.microrel.2012.06.127
  • Meinshausen, L.; Weide-Zaage, K.; Fremont, H. (2012): Electro- and Thermomigration induced Failure Mechanisms in Package on PackageMicroelectronics Reliability, Volume 52, Issue 12, Pages 2889–2906
    DOI: 10.1016/j.microrel.2012.06.115
  • Armbrecht, G.; Zietz, C.; Denicke, E.; Rolfes, I. (2011): Antenna Impact on the Gauging Accuracy of Industrial Radar Level MeasurementsIEEE Transactions on Microwave Theory and Techniques, Vol. 59, No. 10, pp. 2554-2562, October 2011
  • Banz, C.; Hesselbarth, S.; Flatt, H.; Blume, H.; Pirsch, P. (2011): Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-ImplementationTransactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), Springer
  • Bauer, I.; Weide-Zaage, K.; Meinshausen, L. (2011): Influence of Air Gaps on the Thermal Electrical Mechanical Behavior of a Copper MetallizationMicroelectronics Reliability, Volume 51, Issues 9–11, Pages 1587–1591
    DOI: 10.1016/j.microrel.2011.07.011
  • Blume, H.; Bischl, B.; Botteck, M.; Igel, C.; Martin, R.; Roetter, G.; Rudolph, G.; Theimer, W.; Vatolkin, I.; Weihs, C. (2011): Huge Music Archives on Mobile Devices - Toward an automated dynamic organizationIEEE Signal Processing Magazine, Special Issue on Mobile Media Search, 28(4), IEEE, (24-29)
  • Blume, H.; Flügel, S.; Kunert, M.; Ritter, W.; Sikora, A. (2011): Mehr Sicherheit für FußgängerElektronik automotive, (12.2011), WEKA Fachmedien GmbH (32-37)
    ISBN: 1614-0125
  • Meinshausen, L.; Weide-Zaage, K.; Frémont, H. (2011): Migration induced material transport in Cu-Sn IMC and SnAgCu micro bumpsMicrolectronics Reliability, Volume 51, Issues 9–11, Pages 1860–1864
    DOI: 10.1016/j.microrel.2011.06.032
  • Denicke, E.; Armbrecht, G.; Rolfes, I. (2010): Präzise Radarfüllstandsmessungen in Schwallrohren (Precise Radar Filling Level Measurements in Still Pipes)tm - Technisches Messen, Vol. 77, No. 7-8, 2010, pp. 381-393
  • Denicke, E.; Armbrecht, G.; Rolfes, I. (2010): Radar distance measurements in circular waveguides involving intermodal dispersion effectsInternational Journal of Microwave and Wireless Technologies, Vol. 2, No. 3-4 (Special Issue on European Microwave Week 2009), August 2010, pp. 409-417
  • Dragon, R.; Dolar, C.; Ostermann, J.; Rieger, M.; Blume, H.; Abel, F.; Kärger, P. (2010): Intelligente VideoüberwachungUnimagazin Leibniz Universität Hannover, 2010(03/04), (34 - 37)
  • Flatt, H.; Tarnowsky, A.; Blume, H.; Pirsch, P. (2010): Hardware-Abbildung eines videobasierten Verfahrens zur echtzeitfähigen Auswertung von Winkelhistogrammen auf eine modulare Coprozessor-ArchitekturAdvances in Radio Science, 8, (135-142)
    DOI: 10.5194/ars-8-135-2010
  • Payá-Vayá, G.; Martín-Langerwerf, J.; Pirsch, P. (2010): A Multi-Shared Register File Structure for VLIW ProcessorsJournal of Signal Processing Systems, 58(2), Springer New York (215-231)
    DOI: 10.1007/s11265-009-0355-2
    ISBN: 1939-8018 (Print) 1939-8115 (Online)
  • Ciptokusumo, J.; Weide-Zaage, K.; Aubel, O. (2009): Investigation of Stress Distribution in Via Bottom of Cu-Via Structures with different Via form by means of SubmodelingMicroelectronics Reliability, Vol. 49, No 9-11, Pages 1090-1095 (Best Paper Award)
    DOI: 10.1016/j.microrel.2009.07.043
  • Rabe, H.; Denicke, E.; Armbrecht, G.; Musch, T.; Rolfes I. (2009): Considerations on radar localization in multi-target environmentsAdvances in Radio Science, Vol. 7, 2009, pp. 5-10
  • Armbrecht, G.; Denicke, E.; Rolfes, I.; Pohl, N.; Musch, T.; Schiek, B. (2008): Compact mode-matched excitation structures for radar distance measurements in overmoded circular waveguidesAdvances in Radio Science, Vol. 6, 2008, pp. 9-17
  • Blume, H.; Sydow, v.; Rotenberg, L.; Bothe, H.; Brakensiek, J.; Noll, G. (2008): OpenMP-based Parallelization on an MPCore Multiprocessor Platform - A Performance and Power AnalysisJournal of Systems Architecture, 54(11), (1019-1029)
  • Dolar, C. (2008): Simulating LCD Moving-Image Representation and PerceptionInformation Display, 02/2008
  • Dolar, C. (2008): LCD models to analyze and simulate motion artifactsJournal of the Society for Information Display, 16(10), (1001-1007)
  • Jeschke, H. (2008): Efficiency measures for SOC conceptsJournal of Systems Architecture, 54(11), Elsevier B.V. (1039-1045)
  • McLaughlin, K.; Sezer, S.; Blume, H.; Yang, X.; Kupzog, F.; Noll, G. (2008): A Scalable Packet Sorting Circuit for High-Speed WFQ Packet SchedulingIEEE Transactions on Very Large Scale Integration, 16(7), (781-791)
  • Neumann, B.; Sydow, v.; Blume, H.; Noll, G. (2008): Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPsJournal of VLSI Signal Processing, 53(1-2), (129-143)
  • Panitz, P.; Olbrich, M.; Barke, E.; Buehler, M.; Koehl, J. (2008): Design of Robust Signal and Clock NetworksProceedings in Applied Mathematics and Mechanics, Proceedings in Applied Mathematics and Mechanics(Volume 7, Issue 1), GAMM, Wiley InterScience (2)
    DOI: 10.1002/pamm.200700468
  • Richter, M.; Dolar, C.; Lenke, S.; Schröder, H.; Erdler, O.; Sartor, P. (2008): Reduktion von Bewegungsunschärfe durch bewegungsabhängige synthetische DetailsignaladditionFKT Ausgabe 11 2008, Schiele&Schön
  • Weide-Zaage, K. (2008): Simulation of Migration Effects in Solder BumpsIEEE Transactions on Device and Materials Reliability, Volume 8, Issue 3, pp. 442-448
    DOI: 10.1109/TDMR.2008.2002342
  • Weide-Zaage, K.; Kashanchi, F.; Aubel, O. (2008): Simulation of Migration Effects in Nanoscaled Copper MetallizationsMicroelectronics Reliability, Vol. 48, No 8-9, Pages 1398-1402
    DOI: 10.1016/j.microrel.2008.06.025
  • Weide-Zaage, K.; Zhao, J.; Ciptokusumo, J. (2008): Determination of Migration Effects in Cu-Via Structures with Respect to Process Induced StressMicroelectronics Reliability, Vol. 48, No 8-9, pp.1393–1397
    DOI: 10.1016/j.microrel.2008.06.028
  • Blume, H.; Becker, D.; Rotenberg, L.; Botteck, M.; Brakensiek, J.; Noll, G. (2007): Hybrid Functional- and Instruction-Level Power Modeling for Embedded and Heterogeneous Processor ArchitecturesJournal of Systems Architecture, 53(10), (689-702)
  • Blume, H.; Sydow, v.; Becker, D.; Noll,, G. (2007): Application of Deterministic and Stochastic Petri Nets for Performance Modeling of NoC ArchitecturesJournal of Systems Architecture, 53(8), (466-476)
  • Dolar, C. (2007): Auswirkungen des Displays auf die Qualität der BewegtbildwiedergabeFKT. Ausgabe 3 2007, Schiele&Schön
  • Jeschke, H. (2007): Chip size estimation for SOC design space explorationJournal of Systems Architecture,Embedded Computer Systems: Architectures, Modeling, and Simulation, 53(10), Elsevier (764-776)
  • Rottke, A.; Jambor T. (2007): Schüler entwerfen Micro-ChipZeitschrift Elektronik 05/2-1, (05), WEKA Fachzeitschriften-Verlag . Poling (46-52)
  • Weide-Zaage, K.; Dalleau, D.; Danto, Y. (2007): Dynamic Void formation in a DD-copper-structure with different metallization geometryMicroelectronics Reliability, Vol. 47, No 2-3, pp.319-325.
    DOI: 10.1016/j.microrel.2006.09.012
  • Blume, H.; Sydow, v.; Noll,, G. (2006): A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication DomainJournal of VLSI Signal Processing 2006, 43(2-3), (223-233)
  • Livonius, v.; Blume, H.; Noll, G. (2006): Hochqualitative Bewegungsschätzung unter Verwendung von Meta-BildinformationenEingeladener Beitrag für die Fachzeitschrift Fernseh- und Kinotechnik (FKT), 1-2, (19-24)
  • Oehmen, J.; Olbrich, M.; Hedrich, L.; Barke, E. (2006): Modeling Lateral Parasitic Transistors in Smart Power ICsIEEE Transactions on Device and Materials Reliability, 6(3), IEEE (408-420)
    DOI: 10.1109/TDMR.2006.881506
    ISBN: 15304388
  • Pirsch, P. (2006): Seiner Zeit voraus gedachtUni Magazin Hannover, Leibniz, Auf den Spuren des großen Denkers, 3-4, Leibniz Universität Hannover, (36-39)
  • Pirsch, P.; Dehnhardt, A.; Flatt, H.; Flügel, S. (2006): Hardware-Realisierungen komplexer Bild- und VideosignalverarbeitungTele Kommunikation Aktuell, 60. Jahrgang, Heft 07-12, Juli-Dezember 2006
  • Blume, H.; Feldkämper, H.; Noll, G. (2005): Model-based Exploration of the Design Space for Heterogeneous Systems-on-ChipJournal of VLSI-Signal Processing, 40(1), (19-34)
  • Stolberg, -.; Berekovic, M.; Moch, S.; Friebe, L.; Kulaczewski, B.; Flügel, S.; Klußmann, H.; Dehnhardt, A.; Pirsch, P. (2005): HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal ProcessingJournal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 41(1), Springer Science+Business Media (9-20)
    ISBN: 09225773
  • Stolberg, -.; Berekovic, M.; Pirsch, P. (2005): A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing ApplicationsJournal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 41(2), Springer Science+Business Media B.V., New York (139-151)
    ISBN: 09225773
  • Weide-Zaage, K.; Horaud, W.; Frémont, H. (2005): Moisture diffusion in Printed Circuit Boards: Measurements and Finite- Element- SimulationsMicroelectronic Reliability, Volume 45, Issues 9–11, Pages 1662–1667
    DOI: 10.1016/j.microrel.2005.07.077
  • Berekovic, M.; Moch, S.; Pirsch, P. (2004): A scalable, clustered SMT processor for digital signal processingACM SIGARCH Computer Architecture News, 32(3), ACM Press New York, NY, USA (62-69)
    ISBN: 01635964
  • Blume, H.; Feldkämper, H.; Sydow, v.; Noll, G. (2004): Auf die Mischung kommt es an - Probleme beim Entwurf von zukünftigen Systems-on-Chip (Teil I und II)Elektronik, 19+20, (54-64 und 62-67)
  • Fremont, H.; Deletage, J.-Y.; Weide-Zaage, K.; Danto, Y. (2004): How to study delamination in plastic encapsulated devicesMicroelectronics Reliability, Vol. 44, No 9-11, Pages 1311-1316
    DOI: 10.1016/j.microrel.2004.07.015
  • Jeschke, H. (2004): Schließanlagen wirtschaftlich betrachtet: Elektronik gewinnt schon nach wenigen Jahrenwik Zeitschrift für die Sicherheit der Wirtschaft(5), (63-64)
  • Moch, S.; Berekovic, M.; Stolberg, -.; Friebe, L.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2004): HiBRID-SoC: A Multi-Core Architecture for Image and Video ApplicationsACM SIGARCH Computer Architecture News, 32(3), ACM Press New York, NY, USA (55-61)
    ISBN: 01635964
  • Dalleau, D.; Weide-Zaage, K.; Danto, Y. (2003): Simulation of time depending void formation in copper, aluminum and tungsten plugged via structuresMicroelectronics Reliability, Vol. 43, Pages 1821-1826.
    DOI: 10.1016/S0026-2714(03)00310-X
  • Weide-Zaage, K.; Dalleau, D.; Yu, X. (2003): Stationary and dynamic analysis of failure locations and void formation in interconnects due to the different migration mechanismsMaterials Science in Semiconductor Processing 6, Volume 6, Issues 1–3, Pages 85-92
    DOI: 10.1016/S1369-8001(03)00075-1
  • Berekovic, M.; Pirsch, P.; Selinger, T.; Miro, C.; Lafage, A.; Wels, -.; Heer, C.; Ghigo, G. (2002): Architecture of an Image Rendering Co-Processor for MPEG-4 Visual CompositingKluwer Journal of VLSI Signal Processing Systems, 31(2), Kluwer Academic Publishers (157-171)
    ISBN: 09225773
  • Berekovic, M.; Stolberg, -.; Pirsch, P. (2002): Multi-Core System-On-Chip Architecture for MPEG-4 Streaming VideoTransactions on Circuits and Systems for Video Technology (CSVT), 12(8), IEEE Periodicals / Transactions/Journals Department (688-699)
    ISBN: 10518215
  • Blume, H.; Bluethgen, -.; Henning, C.; Osterloh, P.; Noll, G. (2002): Embedding of Dedicated High-Performance ASICs into Reconfigurable Systems Providing Multimedia FunctionalityJournal of VLSI Signal Processing, 31, (117-126)
  • Blume, H.; Herczeg, G.; Erdler, O.; Noll, G. (2002): Object based refinement of motion vector fields applying probabilistic homogenization rulesIEEE Transactions on Consumer Electronics, 48(3), (694-701)
  • Rudack, M.; Redeker, M.; Hilgenstock, J.; Moch, S.; Castagne, J. (2002): A Large-Area Integrated Multiprocessor System for Video ApplicationsIEEE Design & Test of Computers, January-February 2002, 19(1), IEEE Computer Society, Los Alamitos (6-17)
    ISBN: 07407475
  • Dalleau, D.; Weide-Zaage, K. (2001): Three-Dimensional Voids Simulation in chip Metallization Structures: a Contribution to reliability EvaluationMicroelectronics Reliability, Volume 41, Issues 9–10, Pages 1625–1630
    DOI: 10.1016/S0026-2714(01)00151-2
  • Pirsch, P.; Reuter, C.; Wittenburg, P.; Kulaczewski, B.; Stolberg, -. (2001): Architecture Concepts for Multimedia Signal ProcessingJournal of VLSI Signal Processing Systems, 29(3), Kluwer Academic Publishers, Boston, USA (157-165)
    ISBN: 09225773
  • Abke, J.; Küter, J. (2000): FPGAs: Architekturen, Systeme und Schaltungspartitionierungit+ti: Informationstechnik und Technische Informatik, 42(2), (20-26)
  • Hinrichs, W.; Wittenburg, P.; Lieske, H.; Kloos, H.; Ohmacht, M.; Pirsch, P. (2000): A 1.3 GOPS Parallel DSP for High Performance Image Processing ApplicationsIEEE Journal of Solid-State Circuits, 35(7), IEEE Press, Piscataway, NJ (946-952)
    ISBN: 00189200
  • Reuter, C.; Kropp, H.; Pirsch, P. (2000): Rapid Prototyping von Videosignalverarbeitungsverfahrenit+ti Informationstechnik und Technische Informatik, 42(3), Oldenbourg Verlag (5-9)
    ISBN: 0944-2774
  • Bauer, S.; Kneip, J.; Mlasko, T.; Schmale, B.; Vollmer, J.; Hutter, A.; Berekovic, M. (1999): The MPEG-4 Multimedia Coding Standard: Algorithms, Architectures and ApplicationsJournal of VLSI Signal Processing Systems, 23(1), (7-26)
  • Berekovic, M.; Kloos, H.; Pirsch, P. (1999): Hardware Realization of a Java Virtual Machine for High Performance Multimedia ApplicationsJournal of VLSI Signal Processing Systems, 22(1), (31-44)
  • Berekovic, M.; Stolberg, J.; Kulaczewski, B.; Pirsch, P.; Möller, H.; Runge, H.; Kneip, J.; Stabernack, B. (1999): Instruction Set Extensions for MPEG-4 VideoJournal of VLSI Signal Processing Systems, 23(1), (27-50)
  • Blume, H. (1999): Nonlinear vector error tolerant interpolation of intermediate video images by weighted mediansSignal Processing: Image Communication, 14(10), (851-868)
  • Weide-Zaage, K. (1999): Impact of FEM Simulation on Reliability Improvement of PackagingMicroelectronics Reliability, Volume 39, Number 6, Pages 1079-1088(10)
    DOI: 10.1016/S0026-2714(99)00153-5
  • Berekovic, M.; Pirsch, P.; Kneip, J. (1998): An Algorithm-Hardware-System Approach to VLIW Multimedia ProcessorsJournal of VLSI Signal Processing Systems, 20(1-2), (163-180)
  • Blume, H.; Franzen, O.; Schröder, H. (1998): Algorithmen der Videosignalverarbeitung: Optimierung durch EvolutionsstrategienFKT, 1+2, Hüthig Verlag (43-51)
  • D. Habicht (1998): Taschenmesser - Handmeßgeräte für EthernetiX, (69-75)
  • Franzen, O.; Blume, H.; Schröder, H. (1998): FIR-filter design with spatial and frequency design constraints using evolution strategiesEURASIP Signal Processing Journal, 68(3), (295-306)
  • Herrmann, K.; Otterstedt, J.; Jeschke, H.; Kuboschek, M. (1998): A MIMD-Based Video Signal Processing Architecture Suitable for Large Area Integration and a 16.6cm2 Monolithic ImplementationIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 6(2), (284-291)
  • Pirsch, P.; Stolberg, -. (1998): VLSI Implementations of Image and Video Multimedia Processing SystemsIEEE Transactions on Circuits and Systems for Video Technology, 8(7), (878-891)
  • Blume, H. (1997): A new algorithm for nonlinear vectorbased upconversion with center weighted mediansSPIE Journal of Electronic Imaging, 6(3), (368-378)
  • Blume, H. (1997): Nichtlineare fehlertolerante Interpolation von ZwischenbildernDissertation an der Universität Dortmund, 10(503), VDI-Verlag
  • Kneip, J.; Berekovic, M.; Wittenburg, P.; Hinrichs, W.; Pirsch, P. (1997): An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal ProcessorJournal of VLSI Signal Processing, 16(1), (31-40)
  • Pirsch, P.; Stolberg, J.; Chen, K.; Kung, Y. (1997): The Past, Present, and Future of Multimedia Signal ProcessingIEEE Signal Processing Magazine, 14(4), T. Chen, A. Kattsaggelos, S. Y. Kung, (48-51)
  • Yu, X.; Weide, K. (1997): A study of the thermal-electrical- and mechanical influence on degradation in an aluminum-pad structureMicroelectronics Reliability, Volume 37, Issues 10–11, Pages 1545–1548
    DOI: 10.1016/S0026-2714(97)00105-4
  • D. Habicht (1996): Verbindende VereinbarungenBusiness-Online, (44-45)
  • D. Habicht (1996): WWW von der Stange - Web-Server-Komplettangebote im VergleichiX, (48-56)
  • E. Barke (1996): Bei Electronic Design Automation bleibt der Weg das ZielF&M, 104(6)
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  • Rönner, K.; Kneip, J. (1996): Architecture and Applications of the HiPAR Video Signal ProcessorIEEE Transactions on Circuits and Systems for Video Technology, 6(1), (56-65)
  • Weide, K.; Menhorn, F.; Yu, X. (1996): Finite element investigations of mechanical stress in metallization structuresMicroelectronics Reliability, Vol.36, No.11/12, Pages 1703-1706
    DOI: 10.1109/ESREF.1996.888196
    ISBN: 0-7803-3369-1
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  • Gehrke, W.; Gaedke, K. (1995): Associative Controlling of Monolithic Parallel Processor ArchitecturesIEEE Transactions on Circuits and Systems for Video Technology, 5(5), (453-464)
  • J. Stohmann (1995): Optimalisten - Synthesetools für die ASIC- und FPGA-EntwicklungELRAD, (56-63)
  • Kneip, J.; Ohmacht, M.; Rönner, K.; Pirsch, P. (1995): Architecture and C++-Programming Environment of a Highly Parallel Image Signal ProcessorMicroprocessing and Microprogramming, 41(5-6), (391-408)
  • Pirsch, P.; Demassieux, N.; Gehrke, W. (1995): VLSI Architectures for Video Compression - A SurveyProceedings of the IEEE, 83(2), (220-246)
  • Schönfeld, M.; Franzen, J.; Schwiegershausen, M.; Pirsch, P.; Vehlies, U.; Münzner, A. (1995): The LISA Design Environment for the Synthesis of Array Processors Including Memories for the Data Transfer and Fault Tolerance by Reconfiguration and Coding TechniquesJournal of VLSI Signal Processing, 11(1/2), (51-74)
  • Weide, K. ; Ullmann, J. ; Hasse, W. (1995): Model Calculations on a Bipolar Transistor Emitter Interconnection with Different Contact ShapesApplied Surface Science, Volume 91, Issues 1–4, Pages 234–238
    DOI: 10.1016/0169-4332(95)00124-7
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  • Franzen, J. (1993): A Design Method for On-Line Reconfigurable Array ProcessorsJournal of VLSI Signal Processing, 5(1), (21-35)
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Dissertationen

  • Arndt, O. J. (2020): Modellierung von paralleler Software für homogene und heterogene Multiprozessor-SystemeGottfried Wilhelm Leibniz Universität Weitere Informationen
    DOI: 10.15488/9945
  • Lutz, D. (2020): Integrated high-voltage switched-capacitor DC-DC converters Weitere Informationen
  • Renz, P. (2020): Integrated hybrid resonant DCDC converters for portable applicationsSpringer Weitere Informationen
    ISBN: ISBN 978-3-030-63944-0
  • Cholewa, F. (2019): Time domain based image generation for synthetic aperture radar on field programmable gate arraysGottfried Wilhelm Leibniz Universität Weitere Informationen
    DOI: 10.15488/5234
  • Dürre, J. (2019): Ein skalierbares und flexibles FPGA-Framework für Lehre und Rapid-PrototypingShaker Verlag Weitere Informationen
    ISBN: 978-3-8440-6780-4
  • Funk, T. (2019): Integrated Wide-Bandwidth Current Sensing Weitere Informationen
  • Gröger, J. (2019): Dual-Loop Gate Drivers with Analog and Digital Slope Shaping Weitere Informationen
  • Krause, A. (2019): Variation-aware behavioural modelling using support vector machines and affine arithmetic Weitere Informationen
    DOI: 10.15488/9165
  • Lamm, Jesko G. (2019): Exploration von Systemtests für die digitale Signalverarbeitung in HörgerätenShaker Verlag Weitere Informationen
    ISBN: 978-3-8440-7046-0
  • Neuenhahn, M. C. (2019): Emulator- und kostenbasierte Analyse von Network-on-ChipGottfried Wilhelm Leibniz Universität Hannover Weitere Informationen
    DOI: 10.15488/5150
  • Quenzer-Hohmuth, S. (2019): Integrated switched-mode power supplies with digital control enabling fast transient responses and parameter identification
    DOI: https://doi.org/10.15488/11165
  • Seidel, A. (2019): Highly integrated gate drivers for Si and GaN power transistorsSpringer Weitere Informationen
    ISBN: 978-3-030-68940-7
  • Wielage, M. (2019): Design Space Exploration von Architekturen zur echtzeitfähigen Implementierung schneller Backprojection-VerfahrenVerlag Dr. Hut Weitere Informationen
    ISBN: 978-3-8439-4163-1
  • Mentzer, N. (2018): Applikationsspezifische Prozessoren zur Punktkorrespondenzsuche in der Stereo-Bildverarbeitung für automotive AnwendungenVerlag Dr. Hut Weitere Informationen
    ISBN: 978-3-8439-3865-5
  • Schewior, G. (2018): Algorithmen und Hardware-Architekturen zur modellbasierten Bewegungsbestimmung in videobasierten Fahrerassistenzsystemen Verlag Dr. Hut Weitere Informationen
    ISBN: 978-3-8439-3739-9
  • Wittmann, J. (2018): Integrated high-Vin multi-MHz convertersSpringer Weitere Informationen
    ISBN: 9783030252564
  • Leibold, C. (2017): Drahtlos gekoppelte Sensoreinheiten für das Monitoring von organischen Kultivierungsprozessen in Tissue Engineering Bioreaktoren Verlag Dr. Hut Weitere Informationen
    ISBN: 978-3-8439-3233-2
  • Blume, S. (2015): Zur systematischen Ermittlung Hardware-geeigneter Zahlendarstellungen für Algorithmen der digitalen SignalverarbeitungShaker Verlag Weitere Informationen
    ISBN: 978-3-8440-3691-6
  • Brückner, H.-P. (2015): Design und Evaluation von Hardware-Architekturen zur mobilen Sonifikation von Bewegungen in der SchlaganfallrehabilitationVerlag Dr. Hut Weitere Informationen
    ISBN: 978-3-8439-2197-8
  • Pfitzner, M. (2015): FPGA-basierte Hardware-Architektur für die Echtzeit-SAR-Bilddatengenerierung mit integrierter Motion CompensationVerlag Dr. Hut Weitere Informationen
    ISBN: 978-3-8439-2121-3
  • Schmädecke, I. (2014): Entwurfsraum-Exploration von Hardware-Architekturen zur Klassifikation von Audio-SignalenShaker Verlag Weitere Informationen
    ISBN: 978-3-8440-3139-3
  • Banz, C. (2013): Design and Analysis of Architectures for Stereo VisionShaker Verlag (196)
    DOI: 10.2370/9783844024012
    ISBN: 978-3-8440-2401-2
  • Septinus, K. (2012): Design, Compiler-Werkzeuge und Evaluation einer FSM-basierten Prozessoreinheit für hochratige Multistandard-DatenpaketverarbeitungCuvillier Verlag Göttingen
    ISBN: 978-3-95404-199-2
  • Flatt, H. (2011): Eine konfigurierbare RISC/Coprozessor-Architektur zur Echtzeitverarbeitung von ObjekterkennungsverfahrenInformationstechnik, Shaker Verlag (136) Weitere Informationen
    ISBN: 978-3-8322-9977-4
  • Langemeyer, S. (2011): Architektur eines 2D-FFT-Coprozessor-Systems für die Echtzeit-SAR-BilddatenverarbeitungInformationstechnik, Shaker Verlag (170)
    ISBN: 978-3-8440-0090-0
  • Martín-Langerwerf, J. (2011): Emulationsbasierte Analyse von Multiprozessorsystemen für Multimedia-AnwendungenShaker Verlag
  • Payá Vayá, G. (2011): Design and Analysis of a Generic VLIW Processor for Multimedia ApplicationsInformationstechnik, Informationstechnik, Shaker Verlag (194)
    DOI: 10.2370/9783844000641
    ISBN: 978-3-8440-0064-1
  • Dolar, C. (2010): LCD-Modelle und ihre Anwendung in der VideosignalverarbeitungKommunikationstechnik, Shaker Verlag
    ISBN: 978-3-8322-9345-1
  • Nolte, N. (2010): Ein speichereffizienter, programmierbarer Prozessor zur Entropiedecodierung hochratiger HDTV-Videobitströme
    ISBN: 978-3-18-381110-6
  • Freisfeld, M. (2009): Semi-symbolische Modellierung und Simulation von Unsicherheiten in analogen Schaltungen mit Hilfe stückweise affiner Abbildungen
    DOI: urn:nbn:de:gbv:089-6058936598
  • Hassine, A. (2009): Ein Ansatz zur formalen Beschreibung von ChipdesignprozessenVerlag Dr. Hut, München (126)
    ISBN: 978-3-86853-080-3
  • Panitz, P. (2009): On the Design and Analysis of Robust VLSI Interconnect NetworksDr. Hut (161)
    ISBN: 978-3-86853-108-4
  • Flügel, S. (2008): Kompakte Cache-Architekturen für SPMD-ProzessorenDer Andere Verlag
    ISBN: 978-3-89959-733-2
  • Friebe, L. (2007): Identifikation von entwurfsspezifischen Komplexgattern und ihr Einfluss auf die Realisierung von GatternetzlistenFortschritt-Berichte VDI, 10(782), VDI Verlag
  • Oehmen, J. (2007): Modellierung lateraler parasitärer Transistoren in monolithischen Smart-Power-Schaltungen
    ISBN: 3899634241
  • Ringe, M. (2007): Statische Timinganalyse unter Berücksichtigung kapazitiver Kopplung
  • Jachalsky, J. (2006): Strategien für die Instruktionscodekompression in cache-basierten, eingebetteten SystemenFortschritt-Berichte VDI, 10(776), VDI Verlag
  • Stolberg, H. (2006): Dynamische Performance-Schätzung für Verfahren der Multimedia-SignalverarbeitungFortschritt-Berichte VDI, 10(773), VDI Verlag
  • Berekovic, M. (2005): Eine skalierbare, verteilte Prozessor-Architektur mit simultanem Multi-Threading für Anwendungen der digitalen SignalverarbeitungFortschritt-Berichte VDI, 9(377), VDI Verlag
  • Jeschke, H. (2005): Kosten- und Performance-Modellierung applikationsspezifischer VLSI-ArchitekturenDissertation Universität Hannover, Hochschulschrift
  • Lagudu, S. (2005): Instruction Level Configurable Arithmetic Unit for MPEG Audio Signal Processing AlgorithmsFortschritt-Berichte Elektronik, 9(376), VDI-Verlag
  • Olbrich, M. (2005): Platzierung in integrierten Schaltungen mit AufenthaltswahrscheinlichkeitenDissertation, Verlag Dr. Hut, München
    ISBN: 3899632761
  • Salewski, S. (2005): Floorplanning von vertikal integrierten Schaltungen (3D-ICs) unter Berücksichtigung der TemperaturverteilungDissertation, Verlag Dr. Hut, München
    ISBN: 3899632508
  • Hermann, A. (2004): Automatische Platzierung von Substratkontakten in integrierten Mixed-Signal-SchaltungenTIB Hannover
  • Hinrichs, W. (2004): Verlustleistungsreduktion beim Schaltungsentwurf auf Register-Transfer-Ebene in Architekturen der digitalen SignalverarbeitungVDI-Verlag GmbH, Düsseldorf
  • Kaya, I. (2004): Ein kräftegesteuerter Platzierer für 3D-ICs mit Berücksichtigung vertikaler Durchkontaktierungen
  • Kropp, H. (2004): Quellenmodell-Architekturen redundanzreduzierender Codierungsverfahren auf LUT-basierten FPGAsVDI-Verlag GmbH, Düsseldorf
  • Lemke, A. (2004): Dimensionierung von Analogschaltungen mit formalen Methoden auf der Basis affiner ArithmetikTIB Hannover
  • Malonnek, C. (2004): Ein leitbahnorientiertes Verfahren für den physikalischen Entwurf integrierter digitaler SchaltungenTIB Hannover
  • Näthke, L. (2004): Ansätze zur automatischen Generierung hierarchischer Verhaltensmodelle von nichtlinearen integrierten AnalogschaltungenLogos Verlag Berlin, Berlin
    ISBN: 3-8325-0592-X
  • Wittenburg, P. (2004): Ein Beitrag zur Design-Raum-Evaluierung von SMT-Architekturen für objektbasierte MultimediaanwendungenVDI-Verlag GmbH, Düsseldorf
  • Harbich, K. (2003): A Timing-Driven RTL-Based Design Flow for Multi-FPGA Rapid Prototyping SystemsVDI Verlag GmbH, Düsseldorf
  • Hilgenstock, J. (2003): Selbstkalibrierende mesochrone Taktung für global-asynchrone lokal-synchrone SchaltungenFortschritt-Berichte VDI, 9(366), VDI-Verlag GmbH, Düsseldorf
    ISBN: 3183366096
  • Lieske, H. (2003): Buspipelining als Architekturmaßnahme zur Überwindung von Problemen beim Einsatz in der Deep Subµ-TechnologieFortschritt-Berichte VDI, 9(370), VDI-Verlag GmbH, Düsseldorf
    ISBN: 3183370093
  • Silvant, M. (2003): Multilevel Substrate Modeling for Mixed-Technology and Mixed-Signal Integrated CircuitsVDI Verlag GmbH, Düsseldorf
  • Abke, J. (2002): Strukturgesteuerte Abbildung von Register-Transfer-Komponenten für Daten- und Steuerpfade auf LUT-basierte FPGAsVDI Verlag GmbH, Düsseldorf
  • Freimann, A. (2002): Probabilistisches Verfahren zur Bestimmung der Verlustleistung für Architekturen der digitalen SignalverarbeitungFortschritt-Berichte VDI, 20(355), VDI-Verlag GmbH, Düsseldorf
    ISBN: 3183355205
  • Hartong, W. (2002): Ansätze zum Model-Checking nichtlinearer analoger SystemeVDI Verlag GmbH, Düsseldorf
  • Ohmacht, M. (2002): Kopplung von Scheduling- und Allokationsphase für ILP-Prozessoren mit heterogenem RegistersatzFortschritt-Berichte VDI, 10(706), VDI Verlag GmbH, Düsseldorf
    ISBN: 3183706105
  • Adler, T. (2001): Algorithmen zur optimierten Verdrahtung integrierter AnalogschaltungenVDI Verlag GmbH, Düsseldorf
  • Do, -. (2001): Pipelining zur Steigerung der Effizienz von rechenintensiven Algorithmen auf Look-up Table-basierten FPGAsUniversität Hannover
  • Herrmann, K. (2001): Speicherarchitekturen für parallele Bildverarbeitungsprozessoren mit integriertem DRAMFortschritt-Berichte VDI, 10(658), VDI-Verlag GmbH, Düsseldorf
    ISBN: 3183658100
  • Küter, J. (2001): Schaltungspartitionierung für die Logikemulation unter Berücksichtigung der SystemarchitekturVDI Verlag GmbH, Düsseldorf
  • Stohmann, J (2000): Architekturgesteuerte Abbildung von Datenpfadkomponenten auf SRAM-basierte FPGAsVDI Verlag GmbH, Düsseldorf
  • F. Scherber (1999): Zur parallelen Verifikation des Layouts von SubmikrometerschaltungenVDI Verlag, Düsseldorf
  • R. Sedaghat (1999): Fault Emulation: Reconfigurable Hardware-Based Fault Simulation Using Logic Emulation Systems with Optimized Mapping
  • Blume, H. (1997): Nichtlineare fehlertolerante Interpolation von ZwischenbildernDissertation an der Universität Dortmund, 10(503), VDI-Verlag
    ISBN: 9783183503100
  • C. Borchers (1997): Automatische Generierung von Verhaltensmodellen für nichtlineare AnalogschaltungenFortschrittberichte VDI, Reihe 20: Rechnergestützte Verfahren, Nr. -1, VDI Verlag, Düsseldorf
  • D. Behrens (1997): Entwurfsorientierte Partitionierung digitaler SchaltungenVDI Verlag, Düsseldorf
  • Hedrich, L. (1997): Ansätze zur formalen Verifikation analoger SchaltungenVDI Verlag GmbH, Düsseldorf
  • Hoffer, R. (1997): Architekturen für die Codierung mit variablen Codewortlängen auf der Basis inhaltsadressierter SpeicherFortschritt-Berichte VDI, VDI-Verlag, Düsseldorf
  • Kneip, J. (1997): Objektorientierte Cache-Speicher für programmierbare monolithische Multiprozessoren in der digitalen BildverarbeitungVDI-Verlag, Düsseldorf
  • Schwiegershausen, M. (1997): Ein Verfahren zur Optimierung heterogener Multiprozessorsysteme mittels Linearer ProgrammierungFortschrittberichte VDI, 10(512), VDI-Verlag GmbH, Düsseldorf
    ISBN: 3183512106
  • Gaedke, K. (1996): Ein netzlistenbasiertes Verfahren zur Zuverlässigkeitsanalyse fehlertoleranter VLSI-SchaltkreiseVDI-Verlag, Düsseldorf
  • Gehrke, W. (1996): Assoziatives Controlling von programmierbaren Parallelprozessoren für die VideosignalverarbeitungVDI-Verlag, Düsseldorf
  • Rönner, K. (1995): Eine für Bildverarbeitungsverfahren optimierte hochparallele RISC-ArchitekturVDI-Verlag, Düsseldorf
  • Winzker, M. (1995): Reduktion der Verlustleistung integrierter CMOS-Schaltungen durch Anpassung an SignaleigenschaftenVDI-Verlag, Düsseldorf
  • Franzen, J. (1994): Einsatz von Fehlertoleranztechniken in VLSI-Schaltkreisen der digitalen SignalverarbeitungVDI-Verlag, Düsseldorf
  • Grüger, K. (1994): Kaskadierte Registerschaltungen für die Datenformatkonvertierung bei der digitalen VideosignalverarbeitungVDI-Verlag, Düsseldorf
  • Schönfeld, J. (1994): Kompakte Implementierung konturorientierter Bildverarbeitungssysteme mit VLSI-BausteinenVDI-Verlag, Düsseldorf
  • Schönfeld, M. (1994): Graphenbasierte Synthese von Zwischenspeichern für den Datentransfer bei Array-ProzessorenVDI-Verlag, Düsseldorf
  • Komarek, T. (1993): VLSI-Architekturen für Displacementschätzverfahren auf der Basis von Blockmatching-AlgorithmenVDI-Verlag, Düsseldorf
  • Vehlies, U. (1993): Ein Verfahren zur schrittweisen Umsetzung hochsprachlich beschriebener Algorithmen in Array-ProzessorstrukturenVDI-Verlag, Düsseldorf
  • Volkers, H. (1992): Ein Beitrag zu Speicherarchitekturen programmierbarer Multiprozessoren der BildverarbeitungVDI-Verlag, Düsseldorf
  • Münzner, A. (1991): Generierung von arithmetischen Building-Blöcken unter Berücksichtigung anwendungsspezifischer RandbedingungenVDI-Verlag, Düsseldorf

Sonstiges

  • Blume, H.; Payá-Vayá, G.; Gerlach, L. (2020): KAVUAKA Chip Design für digitale HörhilfenUnimagazin : Forschungsmagazin der Leibniz-Universität Hannover, Ausgabe 01|02 2020 Weitere Informationen
    DOI: 10.15488/9966
    ISSN: 1616-4075 - ISSN 0943-5107
  • Blume, H.; Payá-Vayá, G.; Karrenbauer, J.; Benndorf, J.; Blawat, M. (2020): SmartHeaP - Smart Hearing Aid Processor - Ein industrielles Translationsprojekt für digitale HörhilfenUnimagazin : Forschungsmagazin der Leibniz-Universität Hannover, Ausgabe 01|02 2020 Weitere Informationen
    DOI: 10.15488/9973
    ISSN: 1616-4075 - ISSN 0943-5107
  • Blume, H.; van de Par, S.; Thiemann, J.; Seifert, C (2020): Sprecherlokalisation in Hörgeräten - Wie Hörgeräte Stimmen im Raum orten könnenUnimagazin : Forschungsmagazin der Leibniz-Universität Hannover, Ausgabe 01|02 2020 Weitere Informationen
    DOI: 10.15488/9967
    ISSN: 1616-4075 - ISSN 0943-5107
  • Gerlach, L.; Karrenbauer, J.; Payá-Vayá, G.; Blume, H. (2019): High-Performance, Low Power digital hearing aid ASIP/ASICTensilica Day—Trends in Modern Design of Configurable Processors 2019, Hannover, Germany
  • Gerlach, L.; Karrenbauer, J.; Payá-Vayá, G.; Blume, H. (2019): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a Low Power Hearing Aid SystemWirtschaftsempfang der UVN und der Leibniz Universität Hannover Weitere Informationen
  • Gerlach, L.; Payá-Vayá, G.; Blume, H. (2019): The KAVUAKA Hearing Aid ProcessorEuropractice Activity Report 2018-2019 (http://europractice-ic.com) Weitere Informationen
  • Behmann, N.; Blume, H. (2018): Low-Power Implementation of CNN-based Object-Detection on Tensilica Vision Series DSPsTensilica Day 2018, Hannover, Germany
  • Gerlach, L.; Payá-Vayá, G.; Blume, H. (2018): Analyzing the Trade-Off between Power Consumption and Beamforming Algorithm Performance using a Hearing Aid ASIPTensilica Day—Trends in Modern Design of Configurable Processors 2018, Hannover, Germany
  • Gerlach, L.; Payá-Vayá, G.; Blume, H. (2018): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a Low Power Hearing Aid SystemTag der Fakultät - Die akademische Jahresfeier Weitere Informationen
  • Gerlach, L.; Seifert, C.; Payá-Vayá, G.; Blume, H. (2018): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a Low Power Hearing Aid SystemWirtschaftsempfang der UVN und der Leibniz Universität Hannover Weitere Informationen
  • Gerlach, L.; Seifert, C.; Payá-Vayá, G.; Blume, H. (2018): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a Low Power Hearing Aid SystemLeibniz-Symposium “Maschinelles Lernen – Intelligente Digitalisierung” Weitere Informationen
  • Payá-Vayá, G.; Gerlach, L.; Blume, H. (2018): The KAVUAKA Hearing Aid ProcessorTensilica Day—Trends in Modern Design of Configurable Processors 2018, Hannover, Germany
  • Behmann, N.; Blume, H. (2017): High-Performance, Energy-efficient Computer Vision for ADAS on Tensilica Vision P6Tensilica Day 2017, Hannover, Germany
  • Gerlach, L.; Payá-Vayá, G.; Blume, H. (2017): Low-Power Optimization of a VLIW-SIMD ASIP for Hearing Aid DevicesTensilica Day—Trends in Modern Design of Configurable Processors 2017, Hannover, Germany
  • Payá-Vayá, G.; Roskamp, S.; Webering, F.; Blume, H. (2017): Improving the Processing Performance of a DSP for High Temperature Electronics using Circuit-Level Timing SpeculationTensilica Day—Trends in Modern Design of Configurable Processors
  • Weide-Zaage, K. (2017): Considerations Concerning Simulation of Radiation Effects in Chip and PackagesInternational Workshop on Reliability and Radiation Effects of Micro- and Nano-Electronic Devices 2017 (IWRRE-MNED2017) Invited Speaker
  • Gerlach, L.; Nolting, S.; Blume, H.; Payá Vayá, G.; Stolberg, H.; Reuter, C. (2016): A Highly Optimized Arithmetic Software Library and Hardware Co-processor IP for Fixed-Point VLIW-SIMD Processor ArchitecturesTechnology Transfer in Computing Systems (TETRACOM Technology Transfer Project (TTP), 2016), Prague, Czech Republic
  • Gerlach, L.; Seifert, C.; Payá-Vayá, G.; Blume, H. (2016): Instruction-Set Extension based on a 2D Sound Source Localization Algorithm on a Low Power Hearing Aid SystemTensilica Day—Trends in Modern Design of Configurable Processors 2016, Hannover, Germany
  • Gläser, G.; Lee, H.-S. L.; Hennig E.; Olbrich, M.; Barke E. (2016): Automated Refinement of Analog/Mixed-Signal SystemC Models by Non-Functional EffectsUniversity Booth at DATE 2016, Design, Automation & Test in Europe Conference & Exhibition), Dresden, Germany. Weitere Informationen
  • Mentzer, N.; Payá-Vayá, G.; Blume, H. (2016): Analyzing the Performance-Hardware Trade-off of ASIP-based Image Feature ExtractionTensilica Day 2016
  • Arndt, O. J.; Blume, H. (2015): Multicore and Manycore Architectures for Video-Based Advanced Driver Assistance SystemsEingeladener Vortrag bei Konferenz "Multicore@Siemens 2015 - Parallel Software Development", Nürnberg
  • Behmann, N.; Arndt, O. J.; Blume, H. (2015): Choosing the correct vectorization methodMeeting C++ 2015 Lightning Talks Weitere Informationen
  • Gerlach, L.; Payá Vayá, G.; Blume, H. (2015): FPGA-Based Rapid Prototyping for Exploring and Optimizing Hearing Aid Processors10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015), Bremen, Germany
  • Payá Vayá, G.; Gerlach, L.; Nowosielski, R.; Blume, H. (2015): FLINT: Layout-Oriented FPGA-Based Methodology for Fault Tolerant ASIC Design10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015), Bremen, Germany
  • Georgakos, G.; Helms, D.; Ackermann, M.; E. Bär, E. ; Bauer, K.; Bargfrede, J. ; Ecker, W.; Heidmann, N.; Hellwege, N.; Jancke, R.; Koser, E.; Kupke, W.; Melzner, H.; Meyer zu Bexten, V.; Pour Aryan, N.; Pronath, D.; Rott, R.; Vollertsen, R.; Weide-Zaage, K. (2014): RELY - Neue Methoden zum Entwurf von SoCs für kontrollierbare hohe Zuverlässigkeit für Anwendungen wie Transport, Medizin und Automatisierung, Auf dem Weg zu Systemen mit Selbstkontrolle: Höchste Zuverlässigkeit und längere Lebensdauer durch autarke Kompensation von Veränderungen während der LaufzeitNewsletter edacentrum 01/02 2014
  • Arndt, O. J.; Becker, D.; Blume, H. (2013): Parallele Implementierung eines Semi-Global Matching auf eingebetteten Multi-Core Architekturen unter EchtzeitbedingungenEingeladener Vortrag bei Konferenz "Parallel 2013", Karlsruhe
  • Payá-Vayá, G.; Seifert, C.; Blume, H. (2013): Application-Specific Instruction-Set Processors for Ultra-Low-Power Hearing Aid Devices26th International System-on-Chip Conference (SOCC 2013) (invited poster and demo presentation)
  • Blume, H.; Brückner, H.-P.; Leibold, C.; Schmädecke, I. (2012): Mikroelektronik-Ausbildung am Institut für Mikroelektronische Systeme der Leibniz Universität HannoverEingeladener Vortrag beim VDI-Workshop “Projektorientiertes und Problem-basiertes Lernen (PBL) in der Ingenieurausbildung“
  • Brückner, H.-P.; Blume, H. (2012): Mit Hilfe von Tönen wieder schnell mobil werdenTechnik und Leben, Mitgliedermagazin des VDI Bezirksvereins Hannover, 4/2012, VDI, Verein Deutscher Ingenieure
    ISBN: 1433-9897
  • Mentzer, N.; Payá-Vayá, G.; Blume, H. (2012): An ASIP Approach to Find Local Features in Video-Based Surveillance ApplicationsCommunications Signal Processing Workshop 2012 (CSPW 2012)
  • Armbrecht, G.; Denicke, E. (2011): Patentanmeldung "Verfahren zur Eigenschaftsbestimmung von Medien und Messeinrichtung hierzu" ("Method for determining characteristics of media and measuring device for this method")Publication No. EP2302338 (A1), Gottfried Wilhelm Leibniz Universität Hannover (Applicant), March 30, 2011 (Publication Date)
  • Rabe, H.; Denicke, E.; Armbrecht, G. (2011): Patentanmeldung "Verfahren zur Bestimmung mindestens einer Eigenschaft eines Mediums in einem Behälter und Messeinrichtung hierzu"Publication No. DE102010014457A1, Gottfried Wilhelm Leibniz Universität Hannover (Applicant), October 13, 2011 (Publication Date)
  • Armbrecht, G.; Denicke, E.; Schiek, B. (2010): Patent »Wellenübergang und Hornantenne« (»Waveguide and horn antenna«)Publication No. DE102008046054 (A1), DE202008016100 (U1), DE502009000166 (D1), EP2161552 (B1), KROHNE Messtechnik GmbH & Co. KG, Duisburg (Applicant), March 18, 2010 (Publication Date)
  • Armbrecht, G.; Zietz, C.; Denicke, E. (2010): Patent »Dielektrische Antenne« (»Dielectric antenna«)Publication No. DE102009022511, EP2262059, US 8,354,970 B2 , CN101944658, KROHNE Messtechnik GmbH, Duisburg (Applicant), November 25, 2010 (Publication Date)
  • Blume, H. (2008): Modellbasierte Exploration des Entwurfsraumes für heterogene Architekturen zur digitalen VideosignalverarbeitungHabilitation an der RWTH Aachen
  • Jörn, H.; Klein, B.; Schwann, R.; Blume, H.; Noll, G.; Rath, W. (2000): Quantifizierung der Ultraschalluntersuchung im Color-Angio-Verfahren in Echtzeitanalyse - Eine neue MethodeAbstract 17.02.2006 in "Geburtshilfe und Frauenheilkunde"
  • Jörn, H.; Klein, B.; Schwann, R.; Blume, H.; Noll, G.; Rath, W. (2000): Echtzeitanalyse der Plazentadurchblutung im Color-Angio-ModusAbstract 110.6 in "Ultraschall in der Medizin"
  • Martiny, I.; Wicht, B. (2000): Integrierter Bildaufnehmer für das Kohärenzradar (Integrated Optical Sensor for the Coherence Radar System)
  • Willemen, J.; Weide-Zaage, K.; Keck, C.; Diefenbach, J. (1999): Physikalische Modellierung der thermischen Eigenschaften von IC-GehäusenSSE-Bericht Parasitics
  • Amer, A.; Blume, H.; Jostschulte, K.; Lück, M.; Schröder, H. (1997): Verfahren zur Rauschreduktion als Kombination von einer zeitlichen Tiefpaßfilterung und einer kantenerhaltenden örtlichen FilterungPatentanmeldung, P 197 13 177.8