Dr.-Ing. Hartwig Jeschke

Dr.-Ing. Hartwig Jeschke
Adresse
Appelstraße 4
30167 Hannover
Gebäude
Raum
303
Adresse
Appelstraße 4
30167 Hannover
Gebäude
Raum
303
  • Publikationsliste

    Konferenzbeiträge

    • Jeschke, H. (1998): Fuzzy Multiobjective Decision Making On Modeled VLSI Architecture ConceptsProceedings of the International Symposium on Circuits And Systems (ISCAS)
    • Jeschke, H. (2006): Chip Size Estimation for SOC Design Space ExplorationIEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), (56-62)
    • Jeschke, H. (2007): Efficiency Measures for Multimedia SOCsProceedings of SAMOS VII Workshop, 2007, Springer (190-199)
      ISBN: 3540736255
    • Herrmann, K.; Hilgenstock, J.; Gaedke, K.; Jeschke, H.; Pirsch, P. (1996): A Programmable Processing Element Dedicated as Building Block for a Large Area Integrated Multiprocessor SystemIEEE International Conference: Innovative Systems in Silicon, (98-103)
    • Gaedke, K.; Herrmann, K.; Jeschke, H.; Pirsch, P. (1995): AxPe640V - Ein hochintegrierter Videosignalprozessor für die Echtzeit-VideocodierungGME-Fachbericht Mikroelektronik, 15, VDE-Verlag (69-74)
    • Herrmann, K.; Seifert, M.; Gaedke, K.; Jeschke, H.; Pirsch, P. (1994): Architecture and VLSI Implementation of a RISC Core for a Monolithic Video Signal ProcessorVLSI Signal Processing VII, J. Rabaey, P. M. Chau, J. Eldon, IEEE (368-377)
    • Herrmann, K.; Gaedke, K.; Jeschke, H.; Pirsch, P. (1996): A Monolithic Low Power Video Signal Processor for Multimedia ApplicationsInternational Conference on Consumers Electronics (ICCE), (176-177)
    • Pirsch, P.; Jeschke, H. (1991): A MIMD multiprocessor system for real-time image processingProc. of the SPIE / SPSE Symposium on Electronic Imaging: Science & Technology, 1452, (544-555)
    • Jeschke, H.; Volkers, H.; Wehberg, T. (1991): A Multiprocessor System for Real-Time Image Processing Based on a MIMD ArchitectureFrom Pixels to Features II, H. Burkhardt, J. C. Simon, Elsevier (173-185)
    • Wehberg, T.; Volkers, H.; Jeschke, H. (1989): Architektur eines programmierbaren, digitalen Echtzeit-VideosignalprozessorsITG-Fachtagung Mikroelektronik für die Informationstechnik, ITG-Fachbericht 110, (157-162)
    • Volkers, H.; Jeschke, H.; Wehberg, T. (1990): Cache Memory Design For The Data Transport To Array ProcessorsProc. of IEEE Int. Symposium on Circuits and Systems, (49-52)
    • Jeschke, H.; Wehberg, T.; Volkers, H. (1990): A MIMD Based Multiprocessor Architecture for Real-Time Image Processing Suitable for a Monolithic Redundant RealizationProc. of IEEE Int. Conf. on Wafer Scale Integration, IEEE Comp. Soc. Press (40-46)
    • Gaedke, K.; Jeschke, H.; Wehberg, T. (1992): Architecture and Performance of a Large Area Multiprocessor System for Real-Time Video ProcessingProc. of Int. Conf. on Wafer Scale Integration (WSI), IEEE Comp. Soc. Press (19-27)
    • Gaedke, K.; Jeschke, H.; Wehberg, T. (1991): Architecture and Application of a SIMD Based Processing Element for Real-Time Image ProcessingProc. of the ISMM Intl. Workshop Parallel Computing, Trani, Italy, (382-385)
    • Jeschke, H.; Gaedke, K.; Pirsch, P. (1992): A VLSI Based Multiprocessor Architecture for Video Signal ProcessingProc. of IEEE Int. Symposium on Circuits and Systems (ISCAS), (1685-1688)
    • Pfefferkorn, Daniel ; Jeschke, Hartwig; Blume, Holger (2015): Energy- and Latency-Aware Simulation of Battery-Operated Wireless Embedded Networks for Home AutomationProceedings SIES 2015
      DOI: 10.1109/SIES.2015.7185050

    Journalbeiträge

    • Jeschke, H.; Gaedke, K.; Pirsch, P. (1992): Multiprocessor Performance for Real-Time Processing of Video Coding ApplicationsIEEE Transactions on Circuits and Systems for Video Technology, Special Issue On: VLSI Circuits And Systems for Video Applications, 2(2), (221-230)
    • Gaedke, K.; Jeschke, H.; Pirsch, P. (1993): A VLSI Based MIMD Architecture of a Multiprocessor System for Real-Time Video Processing ApplicationsJournal of VLSI Signal Processing, 5(2/3), (159-169)
    • Jeschke, H. (2007): Chip size estimation for SOC design space explorationJournal of Systems Architecture,Embedded Computer Systems: Architectures, Modeling, and Simulation, 53(10), Elsevier (764-776)
    • Jeschke, H. (2008): Efficiency measures for SOC conceptsJournal of Systems Architecture, 54(11), Elsevier B.V. (1039-1045)
    • Jeschke, H. (2004): Schließanlagen wirtschaftlich betrachtet: Elektronik gewinnt schon nach wenigen Jahrenwik Zeitschrift für die Sicherheit der Wirtschaft(5), (63-64)
    • Herrmann, K.; Otterstedt, J.; Jeschke, H.; Kuboschek, M. (1998): A MIMD-Based Video Signal Processing Architecture Suitable for Large Area Integration and a 16.6cm2 Monolithic ImplementationIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 6(2), (284-291)

    Dissertationen

    • Jeschke, H. (2005): Kosten- und Performance-Modellierung applikationsspezifischer VLSI-ArchitekturenDissertation Universität Hannover, Hochschulschrift
  • Forschungsprojekte