CHORUS

Leaders:  Jun.-Prof. Dr.-Ing. G. Payá-Vayá
Email:  guipava@ims.uni-hannover.de
Team:  M.Sc. Sven Gesper
Year:  2018
Sponsors:  BMWi
Lifespan:  01.11.2018 - 31.03.2021

The goal of this project is to create a hardware / software framework that can be used to quickly and easily create and evaluate different applications from the field of image processing and to map them to the massively parallel processing platform that is also developed within this project.

For this purpose, a toolchain will be developed which allows to easily create, test and evaluate various applications from the field of image processing. The complexity of these applications ranges from simple image filters to  complex object recognition using artificial neural networks including their training. Various processing chains shall be able to be assembled from simpler modules according to a modular principle. These modules should then - transparent for the creator of the application - be mapped via a conversion tool to a highly-optimized embedded processor platform. The platform implements a scalable, massively parallel architecture with numerous cores, which will be optimized for the Dream Chip Technologies (DCT) DCT10A System-on-Module platform. This architecture is designed as a programmable array, which can be connected as a co-processor to an arbitrating host processor. By means of appropriate models profiling information regarding computing power and required calculation cores should be presented to the application programmer for evaluation before the actual mapping is conducted.

Thus, the toolchain to be developed implements an evaluation and modeling methodology to quickly and easily develop and translate computer vision applications to the Dream Chip DCT10A platform ("Computer Vision to DCT10A" framework - CV2DCT10A) -framework).

 

Support code: ZF4218302PR8