RAPANUI - Rapid-Prototyping for Media Processor Architecture Exploration

RAPANUI - Rapid-Prototyping for Media Processor Architecture Exploration

Leaders:  Jun.-Prof. Dr.-Ing. G. Payá-Vayá
Team:  M. Sc. Florian Giesemann
Year:  2014
Is Finished:  yes

The Architectures and Systems group of the Institute of Microelectronic Systems covers the whole design process of VLSI-processors for digital signal processing. Mainly, programmable or dedicated signal processors for image, video, and multi-media applications are designed and implemented. The rising complexity of such processors is also reflected in the verification. Thanks to the highly developed emulators based on reconfigurable devices (FPGAs), it is possible to map a complete processor and test it in the context of the target system with real-world scenarios. A main goal of this project is to integrate the rapid prototyping process into a new design methodology to support the exploration and evaluation of new processor architectures and to allow intensive verification.

Traditional processor simulators are implemented with simulation performance in mind, and not the intuitive modeling of the architecture. Therefore, they provide insufficient insight of the influence of modifications of the simulated architecture on different characteristics of the target implementation.

We propose a new prototyping-based design methodology for processor architectures for digital signal processing. Additionally to the performane analysis and verification with an architecture model implemented in an object based language, the system supports the real-time execution of image processing applications on emulated hardware.