ZuSE-KI-Mobil
AI Chip Design Platform for Automotive and Industrial Applications
Abstract
The ZuSE-KI-Mobil (ZuKIMo) research project presents a heterogeneous system-on-chip (SoC) designed for use in a variety of automotive and industrial edge applications. Implemented using GlobalFoundries (GF) 22-nm FD-SOI technology, the SoC features a modular architecture with a configurable, bit-serial, mixed-precision neural processing unit (NPU) core. This core can be adapted to different use cases, comes with a compact instruction set, and improves the performance of dilated convolutions. A hardware-accelerated, tunable image signal processor (ISP) hyperparameter pipeline reduces tuning time and increases detection confidence for AI tasks. The system also incorporates a selective, per-layer fault-tolerance mechanism and supports rapid prototyping via an Apache TVM-driven compiler flow and cycle-accurate simulation. The adaptable hardware generation process is designed with future chiplet-based scaling in mind, providing a flexible foundation for upcoming heterogeneous SoC designs.
Details
- Organisation(s)
-
Institute of Microelectronic Systems
- External Organisation(s)
-
Technische Universität Dresden (TUD)
Dream Chip Technologies GmbH
Karlsruhe Institute of Technology (KIT)
Bayerische Motoren Werke AG
Technical University of Munich (TUM)
Infineon Technologies AG
- Type
- Article
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Volume
- 33
- Pages
- 2961-2974
- No. of pages
- 14
- ISSN
- 1063-8210
- Publication date
- 31.10.2025
- Publication status
- Published
- Peer reviewed
- Yes
- ASJC Scopus subject areas
- Software, Hardware and Architecture, Electrical and Electronic Engineering
- Electronic version(s)
-
https://doi.org/10.1109/TVLSI.2025.3603887 (Access:
Closed
)
