Research
Research Projects

Research projects at the Institute of Microelectronic Systems

Analog/Mixed-Signal-Design

  • Investigation of efficient voltage converter topologies for the next generation of microcontrollers
    The increasing use of driver assistance systems through to fully autonomous vehicles requires the integration of a large number of different sensors in the automobile. More and more powerful microcontrollers are required for the evaluation and further processing of the sensor data. The aim of the project is to research and develop a power management system that can be directly integrated into the microcontroller. The focus is on high energy efficiency, compactness and low costs. In addition, solutions for scalability of the system are to be developed that allow easy adaptation to different output power ranges.
    Leaders: Prof. Dr.-Ing. Bernard Wicht
    Team: Adrian Gehl
    Year: 2021
    Sponsors: Industrie
    Lifespan: 01.04.2020 – 31.03.2023
  • GaN-on-Si
    The GaN-on-Si process technology enables a fully integrated solution for future power electronics, including high efficiency, small size and minimized parasitics. Depending on the level of GaN integration that can be achieved, additional monolithic integration markets become viable. While this offers a significant opportunity for innovation and differentiation, a minimum threshold level of integration is required before this becomes achievable. The aim of this project is to explore the options and limitations for GaN monolithic integration - to gain experience, develop best practice and provide feedback to process development.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Maik Kaufmann
    Year: 2020
    Sponsors: Industrie
    Lifespan: 01.10.2017 – 31.09.2020
  • Fully integrated and system-optimized electronics solutions for solar modules(Voyager-PV)
    For three decades, the idea of inverters integrated directly into the solar module has been pursued in science and industry. With such AC solar modules, enormous cost and quality advantages are possible. The aim of the project is to create the technological prerequisites for a drastic reduction in the cost of small-scale PV system electronics, while at the same time meeting significantly higher reliability and service life requirements in this segment and the new future requirements with regard to grid suitability, digitization and security.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Christoph Hillmer
    Year: 2020
    Sponsors: BMWi 7. Energieforschungsprogramm „Innovationen für die Energiewende“
    Lifespan: 01.04.2020 – 31.03.2023
  • Research on reconfigurable, passive microelectronic components for energy efficiency and flexibility (ERMI)
    This research project uses new, reconfigurable passive components for integrated energy-efficient voltage transformers for local power supply (point-of-load). The goal is increased energy efficiency and a phase-adapted circuit design. This is especially important for multi-phase converters that use a large number of parallel inductors to meet the increasing requirements for highly efficient and powerful power supplies for modern microcontrollers and processors in important growth areas such as mobility, industrial, energy and biomedicine.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Ferdinand Pieper
    Year: 2019
    Sponsors: BMBF „Forschung für neue Mikroelektronik“ (ForMikro)
    Lifespan: 01.10.2019 – 31.09.2023
  • Multi-Energy Harvesting (MEH) - A Flexible Platform for Energy Harvesting in Home Automation
    In this project, a platform concept for intelligent home automation components is developed, which can serve as a basis for next-generation sensors and actors. The main characteristic of this platform concept is ultra-low power consumption and ultra-low voltage operation. In combination with harvested energy from multiple sources (multi-energy harvesting), an extended lifetime and reduced battery cell requirements become possible compared to current systems.
    Leaders: Prof. Dr.-Ing. H. Blume, Prof. Dr.-Ing. B. Wicht, apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: M.Sc. Moritz Weißbrich, M.Sc. Lars-Christian Kähler
    Year: 2019
    Sponsors: BMBF
    Lifespan: October 2018 - March 2021
  • Switched-Mode Power Supplies with Digital Control
    This project explores the possibilities and advantages of adaptive digital control for automotive switched-mode power supplies. The goals are better control performance with less area and lower cost, less parameter variations, improved transient response.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Samuel Quenzer-Hohmuth
    Year: 2018
    Sponsors: Industrie
    Lifespan: completed
  • Highly Integrated Current Sensing for High-performance Power Electronics
    Development of circuit and system concepts for highly integrated current sensing with galvanic isolation for drives / motors and DCDC converters in various power classes.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Tobias Funk
    Year: 2018
    Sponsors: Bundesministerium für Bildung und Forschung / Robert Bosch GmbH
    Lifespan: completed
  • Highly Integrated ACDC Converters for Direct 230 V Mains Supply of Integrated Circuits
    Research on circuit and system concepts for ACDC converters for direct 230V mains supply of integrated circuits (ICs) and electronics modules containing those ICs with the goal to eliminate the need for bulky external power supplies and to optimize the power efficiency dependent on load conditions.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Daniel Lutz
    Year: 2018
    Sponsors: Bundesministerium für Bildung und Forschung
    Lifespan: completed
  • Gate Driver with Digitally Controlled Slope Shaping
    Investigation, modelling and optimization of the switching behavior of various power semiconductors (IGBT, CoolMOS, OPTIMOS, SiC FET). Concept development and circuit design for optimized gate drivers with digitally controlled slope shaping for motor drive, SMPS and PFC applications.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Johannes Gröger
    Year: 2018
    Sponsors: Industry
    Lifespan: completed
  • Fast switching DCDC converters
    Research on circuit concepts for fast switching integrated DCDC converters with the goal of system cost reduction by eleminating external components
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Jürgen Wittmann
    Year: 2018
    Sponsors: Industrie
    Lifespan: completed
  • Gate Drivers for High-Voltage Devices
    System and circuit concepts for gate driver ICs to control galvanic isolated power transistors, including GaN devices. Targets are improvements in reliability, reduced cost and new functionalities.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Achim Seidel
    Year: 2018
    Sponsors: Öffentlich gefördert und Industriekooperation
    Lifespan: completed
  • High-voltage converter ICs >300 V for micro power supplies in IoT applications
    Research on circuit and system concepts for DCDC and ACDC converters for the direct connection of an IC or electronic systems built from it to the 230V network with the motivation to save external large-volume power supplies and to set optimal power efficiency depending on the operation. In addition to IoT, applications in the fields of electromobility, industry and energy are addressed.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Christoph Rindfleisch
    Year: 2017
  • Hybrid DCDC Converters
    Explore the potential of hybrid integrated DCDC converters, by combining inductive and capacitive DCDC converter schemes, study of theory and state-of-the-art, definition and implementation of an innovative converter concept.
    Leaders: Prof. Dr.-Ing. Bernhard Wicht
    Team: Peter Renz
    Year: 2016
    Sponsors: Industry
  • GEBO - High Temperature Electronic
    In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Ing. Rochus Nowosielski
    Year: 2014
    Lifespan: 2009-20111

Biomedical Engineering

  • D-Sense-DL
    Im bereits abgeschlossenen biomedizintechnischen Kooperationsprojekt "D-Sense" wurde ein mobiles Diagnose-System zur Beurteilung der sensomotorischen Regulationsfähigkeit von Sportlern entwickelt. Dieses System aus mehreren Inertialsensoren und speziell entwickelten Algorithmen erlaubt es, verschiedene sensomotorische Testverfahren ohne Anleitung durch einen geschulten Tester selbst durchzuführen. Ziel des aktuell genehmigten Folgeprojekts D-Sense-DL ist es, im Vorfeld der Markteinführung die Validität dieses Systems im Vergleich zu klassischen Messmethoden derselben Testverfahren zu untersuchen. Hierzu wird eine erweiterte Probandenstudie mit einem im Vergleich zum letzten Projekt noch weiter verbesserten Testsystem durchgeführt.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: M.Sc. Fritz Webering
    Year: 2020
  • Smart Hearing Aid Processor (Smart HeaP)
    In the Smart Hearing Aid Processor (Smart HeaP) project, a novel hearing aid processor is designed, developed and built which, despite its simple programmability and wireless Bluetooth interface, is characterized by low power consumption and high computing power.
    Leaders: Prof. Dr.-Ing. H. Blume, apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: Dipl.-Ing. L. Gerlach, M.Sc. J. Karrenbauer
    Year: 2018
    Sponsors: BMBF
    Lifespan: April 2018 - April 2021
  • Efficient Real-time Processing of EEG-Signals
    A brain-computer interface (BCI) is a system that generates signals to control an artificial system based on measurements of the activity of the central nervous system, for example, to replace, enhance or supplement certain tasks of human action. Modern BCIs are often based on the decoding or interpretation of EEG signals, as such systems are both non-invasive and cost-effectively available. These sensors detect a variety of independent, superimposed signals that make their immediate use for controlling a digital system difficult. Therefore, each application and corresponding application environment requires specifically designed and customized algorithms. This project therefore investigates methods for the efficient real-time processing of EEG signals. For this purpose, the Institute of Microelectronic Systems is developing a complete system of dedicated, configurable hardware in combination with a signal-processing framework specially adapted for the processing of EEG signals.
    Leaders: Prof. Dr.-Ing. Holger Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: Marc-Nils Wahalla, Dipl.-Ing.
    Year: 2017
  • ZIM D-Sense - Development of a Testing System for the Diagnosis of Sensorimotor Regulation Abilities in Athletes
    The aim of the project is to develop a mobile diagnostics system which can be used to to assess the sensorimotor regulation abilities in athletes. The system should consist of multiple sensor units and allow the athlete or coach to quickly and precisely perform different functional sensorimotor tests. The sensor units can be placed at different points on or next to the subject's body, depending on the concrete test being performed. Also depending on the test, different algorithms are to be used for classifying and evaluating the measurements from the sensor units. A database helps the user to interpret the test results and provides reference values for risk assessments regarding injuries.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: M.Sc. Fritz Webering
    Year: 2017
    Sponsors: „Zentrales Innovationsprogramm Mittelstand“ of the BMWi - Federal Ministry for Economic Affairs and Energy
    Lifespan: 2017-2019
  • Optogenetic
    Within this cooperation with the Institute of Technical Chemistry and the Institute of Quantum Optics of the Leibniz Universität Hannover, methods are being studied to control the behavior of intracellular processes from the outside with light. Optogenetics can be used to specifically modify light-insensitive cells in order to respond to the influence of light. Due to the common previous experience between the project partners, especially optogenetic questions in the context of tissue engineering are focussed.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Marc-Nils Wahalla, Dipl.-Ing.
    Year: 2016
  • TETRACOM - Mobile platform for real-time sonification of movements for medical rehabilitation
    The rehabilitation of stroke patients is an intense and lengthy process. The common therapy approach is based on movement training in presence of a therapist. Through many repetitions a remobilization of the patient is achieved. Due to this highly time‐consuming treatment, the costs of for the therapy are very high. Therefore, in this research project, we are focusing on the design of a mobile system, which will provide a motion feedback by means of sonification. It will enable therapist‐independent training and as a result lessen the strain on patient and healthcare system.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: M.Sc. Daniel Pfefferkorn
    Year: 2016
    Sponsors: FP7 ‐ ICT ‐ 2013 ‐ 10
    Lifespan: September 2013 - August 2016
  • Hearing4All
    The joint venture "Hearing4all" that the IMS-AS participates in with multiple sub-projects, has been chosen as one of the federal cluster of excellence projects Friday June 15th 2012. In the scope of this project the IMS-AS aims to develop high-performance and low-power processor architectures for digital hearing systems, such as cochlear implants or hearing aids.
    Leaders: Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: M.Sc. C. Seifert, Dipl.-Ing. L. Gerlach
    Year: 2015
    Lifespan: November 2012 - December 2018
  • BIOFABRICATION for NIFE
    BIOFABRICATION for NIFE ist ein interdisciplinary research network between the Hanover Medical School, the Leibniz University of Hanover and the Hanover University of Music, Drama and Media. The goal of this research network is to achieve methods for growing biocompatible organic implants with heavily reduced rejection reactions.
    Leaders: Prof. Dr.-Ing. Blume
    Team: Dipl.-Ing. Christian Leibold
    Year: 2014
    Sponsors: VolkswagenStiftung and County Lower Saxony
    Lifespan: May 2013 - June 2018
  • Real-time, low-latency sonification of complex movements
    The goal of this research project in the field of biomedical engineering is to generate an auditory feedback (sonification) of human movements. The IMS focuses on examing the performance of different hardware platforms for this application. Relevant performance parameters are the platforms power dissipation and the overall latency. Finally, the project goal is to enhance stroke rehabilitation by additionally providing auditory arm movement feedback. This could lead to shortened rehabilitation periods. Furthermore, the mobile hardware platform developed at the IMS allows home based rehabilitation.
    Leaders: Prof. Dr.-Ing. Blume
    Team: Dipl.-Ing. (FH) H.-P. Brückner
    Year: 2013
    Sponsors: Europäischer Fonds für regionale Entwicklung (EFRE)
    Lifespan: February 2011 - June 2013

Electronic Design Automation

  • New Simulation Methods for Accelerated Mixed-Signal Simulation
    This research project is based on an approach for the automated model generation for accelerated mixed-signal simulation of analog circuit models and the associated simulation methodology for a transient analysis. Studies have shown good results, which make a significant acceleration in the simulation of mixed analog/digital-systems. Up to now, the current approach is limited to piecewise-constant input stimuli. One of the fundamental goals of this project is an extension of the novel simulation methodology that enables additional input signal types.
    Leaders: Prof. Dr.-Ing. Erich Barke
    Team: Dipl.-Ing. Sara Divanbeigi
    Year: 2019
    Sponsors: Deutsche Forschungsgemeinschaft (DFG): BA 812/24-1
    Lifespan: March 2014 - February 2017
  • Formal Abstraction and Verification of Analog Circuits (faveAC)
    In the faveAC project, methods are being developed for the modeling and formal verification of analog circuits.
    Leaders: Dr.-Ing. Markus Olbrich
    Team: Malgorzata Rechmal
    Year: 2019
    Sponsors: DFG
    Lifespan: März 2017 - Februar 2020
  • ANCONA: Analog Mixed-Level Modeling with Accelerated Mixed-Signal Simulation to Increase Analog Coverage
    The IMS develops method and measures for the analysis of analog verification coverage. The goal is to evaluate and to increase the verification coverage of analog and mixed-signal circuits.
    Leaders: Dr.-Ing. Markus Olbrich
    Team: Dipl.-Ing. Lukas Lee
    Year: 2017
    Sponsors: BMBF
    Lifespan: Juli 2014 - Juni 2017
  • Untersuchung zur Simulation von Bauelementen und Komponenten für die Entwicklung strahlenrobuster autonomer Systeme
    Im Zuge der Miniaturisierung moderner integrierter Schaltungen verändert sich die Strahlenhärte der Systeme und Komponenten. Daraus resultierend ist es notwendig, die die Strahlenhärte beeinflussenden Mechanismen im Halbleiter zu bestimmen.
    Leaders: PD Dr.-Ing. Dipl.-Phys. Kirsten Weide-Zaage
    Year: 2015
    Lifespan: 01.02.2015-31.12.2017
  • Component reliability in high temperature automotive applications (Rely)
    Thermisch-elektrisch-mechanische Simulation, Degradationsmodellierung auf Device-Level
    Leaders: PD Dr.-Ing. Dipl.-Phys. K. Weide-Zaage
    Team: Dipl.-Ing. Jörg Kludt
    Year: 2014
    Lifespan: 01.05.2011-30.04.2013
  • GEBO - High Temperature Electronic
    In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Ing. Rochus Nowosielski
    Year: 2014
    Lifespan: 2009-20111
  • Parallelisierung von Routingalgorithmen
    Werkzeuge zur Erzeugung der Verdrahtung für einen gegebenen Chip haben aufgrund der Komplexität dieses Problems sehr hohe Laufzeiten. Ziel dieses Forschungsprojektes ist die Beschleunigung dieses Vorgangs durch die Ausnutzung hochparalleler Architekturen, insbesondere Graphical Processing Units. Zu diesem Zweck sollen Algorithmen und Datenstrukturen gefunden werden, die eine effiziente Aufteilung des Problems auf eine große Anzahl an Recheneinheiten erlauben.
    Leaders: Dr.-Ing. Markus Olbrich
    Team: Dipl.-Math. Björn Bredthauer
    Year: 2014
  • RESCAR 2.0
    The IMS is subcontractor of the Infineon AG and will develop methods to manage domain-overlapping constraints.
    Leaders: Prof. Dr.-Ing. Erich Barke
    Team: M.Sc. Carolin Katzschke
    Year: 2014
    Sponsors: BMBF
    Lifespan: February 2011 - April 2014
  • 3D-Floorplanning
    The main goal of this research project is to find appropriate optimization algorithms and datastructures for 3D-Floorplanning. Furthermore, new relevant optimization goals should be identified and analysed.
    Team: M. Sc. Artur Quiring
    Year: 2014
    Lifespan: completed
  • Reliable Behavioural Modelling
    This project aims at generating behavioural models which include parameter variations of the original circuit. Parameter variations are represented by affine arithmetic.
    Leaders: Prof. Dr.-Ing. Erich Barke
    Team: Dipl.-Ing. Anna Krause
    Year: 2014
  • Solving methods for semi-symbolic analog simulation
    Parameters of analog circuits are not exactly known as they are influenced by fabrication, aging or environment temperature. At the Institute of Microelectronic Systems an analog circuit simulator was developed which use affine arithmetic to simulate these parameter deviations. This project aims at increasing the convergence area by using parameter splitting.
    Leaders: Prof. Dr.-Ing. Erich Barke
    Team: Dipl.-Ing. Oliver Scharf
    Year: 2014
    Lifespan: January 2012 - May 2015
  • NEEDS
    Highly integrated electronic systems with heterogeneous components enable reduction of resources and cost. To further benefit from the potential of electronic systems, NEEDS has the goal to advance the research in designing a new class of electronic systems, where several dies are stacked above each other (three-dimensional integrated circuits).
    Leaders: Dr.-Ing. Markus Olbrich
    Team: M. Sc. Artur Quiring
    Year: 2013
    Sponsors: The project NEEDS is funded by the Bundesministerium für Bildung und Forschung (BMBF).
    Lifespan: 2010 - 2013
  • ROBUST
    ROBUST researches new methods and procedures for designing robust nanoelectronic systems. The project defines quantitative measures of robustness. These metrics are determined by abstracting models of robustness and by applying new analysis methods suitable for the system level.
    Leaders: Prof. Dr.-Ing. Erich Barke
    Team: Dipl.-Ing. Michael Kaergel
    Year: 2009
    Sponsors: BMBF
    Lifespan: Mai 2009 - April 2012

Design Space Exploration

  • Compact Realtime SAR-Image processor
    The goals of this project are the generation and compression of high resolution Synthetic Aperture Radar (SAR) images under real time conditions. Compared to camera based electro-optical sensors, a SAR system operates almost independent from daylight and weather conditions. State-of-the-art SAR sensor systems achieve spatial resolutions up to 10 cm at 10 km altitude. By using FPGAs for high performance digital signal processing tasks, aerial images can be generated in real time even in case of very large image dimensions.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: F. Cholewa, C. Fahnemann, N. Rother
    Year: 2020
    Lifespan: 2008-2020
  • Digital Video-processing for automation in agriculture
    Within this project, algorithms are developed, architectures explored and a final hardware-platform designed and evaluated. The overall system will be tested in a field test.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: J. Hartig, S. Gesper
    Year: 2019
    Lifespan: a 2017-2019
  • EFdiS – Use of airborne SAR with digital interface
    The goal of this research project is the processing of FMCW sensor signals. The first step is intended to digitize the analog data on board through a suitable expansion card. In the second step, the digitized data is to be processed on board, and thus converted to an aerial image.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Ing. M. Wielage
    Year: 2014
    Lifespan: October 2012 - December 2014
  • OPARO
    In the development of integrated, programmable circuits, the optimization of power dissipation and temperature distribution is becoming increasingly important. So far, however, these can only be determined by very time-consuming simulations. Therefore, precise models for the determination of power dissipation shall be developed and mapped together with the functional emulation on FPGAs. By accelerating the determination of power dissipation and temperature distribution, specific optimizations of the architecture and the application code can then be made taking real input data into account.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Wirtsch.-Ing. Sebastian Hesselbarth
    Year: 2014

Driver Assistance Systems

  • Adaptive blendfreie HD-Scheinwerfer
    In diesem Projekt werden Signalverarbeitungsalgorithmen für hochauflösende Scheinwerfer entworfen und echtzeitfähig auf verschiedenen Hardwareplattformen implementiert. Durch die adaptiven Scheinwerfersysteme wird unter Anderem eine Blendung von Verkehrsteilnehmern verhindert und die Sicherheit im Straßenverkehr erhöht.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Jens Schleusner, M.Sc.
    Year: 2017
    Lifespan: 2017-2021
  • Verlässliche Mobilität: Mobiler Mensch im Spannungsfeld zwischen Autonomie, Vernetzung und Security
    Die Mobilität der Zukunft basiert wesentlich auf dem hochautomatisierten Fahren und damit auf verlässlichen „Advanced Driver Assistance Systems“ (ADAS). Diese Fahrerassistenzsysteme benötigen eine zuverlässige Erfassung der Umwelt durch die Sensoren der Fahrzeuge, um die erforderliche Verlässlichkeit zu erreichen. Neben Radar- und Lidar-Sensoren verfügen moderne Fahrzeuge über eine Vielzahl von Kameras, die geometrische und semantische Informationen zur Umgebung bereitstellen. Diese verschiedenen Datenströme werden im Anschluss von Datenfusionsalgorithmen auf Fahrzeuginterner Hardware weiterverarbeitet. Zur Berechnung verlässlicher Ergebnisse muss das Gesamtsystem der Signalverarbeitung aus Hardware und Software verlässlich sein. Das Fachgebiet Architekturen und Systeme des IMS wird im Rahmen des Projektes „Mobiler Mensch“ zu diesen Teilaspekten eines Systems zur verlässlichen Datenverarbeitung forschen.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Jens Schleusner, M.Sc.
    Year: 2017
    Lifespan: 2017-2019
  • ifuse - Intelligente Fusion von Radar- und Videosensoren für anspruchsvolle, hochautomatisierte Fahrsituationen
    Im Rahmen des BMWi-geförderten Verbundprojekts ifuse werden Algorithmen und Architekturen zur Fusion von Sensorrohdaten auf niedriger Abstraktionsebene untersucht. Gegenüber bisherigen Fusionsverfahren auf Objektlistenebene ermöglicht die Sensordatenfusion auf Rohdatenebene eine robustere Klassifikation von Objekten und Erfassung des Fahrzeugumfeldes, auch wenn einzelne Sensoren durch Umwelteinflüsse beeinträchtigt sind. Grundlage der Sensordatenfusion auf Rohdatenebene bilden Signale von aktiven und passiven Fahrzeugsensoren (beispielsweise LIDAR, RADAR, Kamera, Ultraschall), welche nach einer minimalen Vorverarbeitung auf ein gemeinsames Koordinatensystem bezogen und in einem Umweltmodell verortet werden.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Nicolai Behmann, M.Sc.
    Year: 2017
    Sponsors: Bundesministerium für Wirtschaft und Energie
    Lifespan: Mai 2017 - April 2020
  • PARIS - PARallele Implementierungs-Strategien für das Hochautomatisierte Fahren
    In diesem Projekt steht das Systemdesign von Fahrerassistenzsystemen vom Szenrio bis hin zur Architektur im Fokus. Es werden sowohl neuartige selbstlernende und Sensorfusions-Algorithmen, als auch eine innovtive Prozessorarchitektur entwickelt. Darüber hinaus werden Entwicklungsschritte für eingebettete MPSoC-Applikationen, wie Architektur-Mapping und Simulationsmethoden, entwickelt.
    Leaders: Prof. Dr.-Ing. Holger Blume, Dipl.-Ing. Jakob Arndt
    Team: Dipl.-Ing. Jakob Arndt
    Year: 2017
    Sponsors: BMBF
    Lifespan: 04.2017 - 03.2020
  • THINGS2DO - THIN but Great Silicon 2 Design Objects
    THINGS2DO is an ENIAC project, funded by the European Union and the Federal Ministry of Education and Research. The project aims to develop the new Fully Depleted Silicon On Insulator (FD-SOI) technology and the corresponding tool environment for high efficient and highly integrated circuits. The capabilities of the technology are further demonstrated through a demonstrator in the area of Advanced Driver Assistance Systems (ADAS).
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Gregor Schewior, Nicolai Behmann
    Year: 2016
    Sponsors: Europäische Union, Bundesministerium für Bildung und Forschung
    Lifespan: February 2016 - March 2018
  • ZIM Dream Chip Technologies GmbH
    In cooperation with Dream Chip Technologies GmbH, Garben, Germany, the Institute of Microelectronic Systems develops with funding from the Federal Ministry of Economic Affairs and Energy a camera system with integrated algorithms for high quality real time motion estimation in the area of driver assistance systems.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Gregor Schewior, Nicolai Behmann
    Year: 2015
    Sponsors: Bundesministerium für Wirtschaft und Energie
    Lifespan: September 2015 - December 2016
  • ASEV
    The goal of this sub-project of the BMBF project "Automatic Situation Interpretation for Event Triggered Video Surveillance" is to elaborate a concept for a hardware architecture that enables a SIFT (Scale Invariant Feature Transform) feature extraction under application-specific processing conditions as performance and power consumption. SIFT features offer a good basis for robust object identification and tracking for event triggered video surveillance. The field of application is thereby the airport apron, which is highly relevant to security. The concept was implemented on a FPGA-based hardware platform to build a demonstrator which was tested at the end of the project at the airport of Braunschweig.
    Leaders: Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: Dipl.-Ing. Nico Mentzer
    Year: 2014
    Sponsors: Bundesministerium für Bildung und Forschung (BMBF)
    Lifespan: Mai 2010 - April 2013
  • Efficient Hardware Architectures for Fast Image Sequence Analysis
    In practice, general reliability of modern driver assistance systems under arbitrary traffic, weather and illumination conditions often is a problem. Because more robust algorithms are computationally very intensive, this project deals with the examination of heterogenous hardware architectures and the evaluation of new mechanisms for complex applications in the field of camera-based driver assistance.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Julian Hartig
    Year: 2014
    Sponsors: Hans L. Merkle Stiftung
    Lifespan: February 2014 - February 2017
  • mDAS - Implementation of a real-time demonstrator for multicore-based driver assistance systems
    The goal of this Project is the conceptual design of a real-time mutlicore-based demonstrator for video-based driver assistance algorithms. Therefore, different performance metrics will be displayed in order to compare platform-specific performance characteristics.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Dipl.-Ing. Jakob Arndt
    Year: 2014
    Sponsors: Siemens AG
    Lifespan: February 2014 - August 2014
  • DESERVE - Development Platform for Safe and Efficient Drive
    DESERVE is a project funded by the European Union. The aim of the project is the promotion and evolution of advanced driver assistance systems (ADAS). These systems are devoted to support the driver in the safe control of the vehicle. For this purpose, the DESERVE platform is planned to be developed. This platform will be the base for future development of advanced driver assistance systems in Europe.
    Leaders: Prof. Dr.-Ing. H. Blume, apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: Florian Giesemann, Frank Meinl, Nico Mentzer
    Year: 2013
    Sponsors: Europäische Union, Bundesministerium für Bildung und Forschung
    Lifespan: September 2012 - August 2015
  • OpenFAS
    In the scope of this project, a library of modules for driver assistence systems, based on a multicore processor architecture will be created. The project is in collaboration with the videantis corporation.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Dipl.-Ing. Christopher Bartels
    Year: 2012
    Sponsors: "Zentrales Innovationsprogramm Mittelstand" des Bundesministeriums für Wirtschaft und Technologie (BMWi)
    Lifespan: Juni 2012 - Oktober 2013
  • PROPEDES - Predictive Pedestrian Protection at Night
    The objectives of the project PROPEDES is the design and demonstration of a flexible hardware archtecture based on a Very Long Instruction Word (VLIW) Softcore microprocessor for a vision-based pedestrian detection. The VLIW processor is to be supported by dedicated hardware accelerators to speed up future high-quality video-based driver assistance systems. Finally the architecture is to be implemented on a real-time FPGA-based demonstrator.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Dipl.-Ing. Gregor Schewior
    Year: 2011
    Sponsors: Bundesministerium für Bildung und Forschung (BMBF)
    Lifespan: August 2008 - July 2011

Processor Architectures

  • ZuSE-KI-mobil
    Für Zukunftsaufgaben wie das autonome Fahren oder Industrie 4.0 müssen immer größere Mengen an Daten von einer steigenden Anzahl von Sensoren mit Hilfe komplexer Algorithmen und künstlicher Intelligenz (KI) in kürzester Zeit analysiert werden. Die entsprechenden Prozessoren müssen aber nicht nur bei der Rechenleistung, sondern auch hinsichtlich Energieeffizienz, Zuverlässigkeit, Robustheit und Sicherheit hohe Anforderungen erfüllen, die über aktuelle Möglichkeiten weit hinausgehen. Die ZuSE-Projekte des BMBF sollen den dringenden Bedarf der Anwenderbranchen an zukunftsfähigen, vertrauenswürdigen Prozessoren decken, die auf ihre spezifischen Aufgaben zugeschnitten und hoch performant sind. Ziel des Vorhabens ist die Entwicklung einer Prozessorplattform für die Entwicklung hoch performanter Elektronik für rechenintensive KI-Anwendungen. Als Kernkomponente wird ein KI-Beschleuniger mit einer flexiblen, erweiterbaren und skalierbaren System-on-Chip –Architektur (SoC) entwickelt. Um einen niedrigen Energieverbrauch zu erreichen, wird der Beschleuniger für KI-Algorithmen im Bereich des autonomen Fahrens optimiert und in der energieeffizienten 22-nm-FDX-Halbleitertechnologie gefertigt. Darüber hinaus wird ein Ökosystem aufgebaut, das ein Entwicklungssystem sowie ein deutsches Partnernetzwerk mit Know-how im KI-Hardware-Entwurf vereint. Die Flexibilität und Skalierbarkeit der Leistungsdaten der Prozessorplattform wird anhand von Demonstratoren verifiziert. Der rechenstarke KI-Beschleuniger, die flexible und skalierbare SoC-Architektur sowie das Ökosystem bilden eine Plattform für die kostengünstige Entwicklung anwendungsspezifischer KI-Hardware in Deutschland und sind für zukünftige Innovationen breit einsetzbar.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Matthias Lüders, M.Sc., Nicolai Behmann, M.Sc.
    Year: 2020
    Sponsors: BMBF
    Lifespan: Mai 2020 - April 2023
  • ZuSE-KI-AVF - Anwendungsspezifischer KI-Prozessor für die intelligente Sensorsignalverarbeitung im autonomen Fahren
    Innovative Fahrerassistenzsysteme erfordern neue, leistungsfähige Hardwareplattformen, die in der Lage sind, hochauflösende und mehrdimensionale Datenmengen in Echtzeit zu verarbeiten. Vielfältige Sensorik wie Kamera, Lidar oder Radar führt zu deutlich voneinander abweichenden Anforderungen, denen mit anwendungsspezifischer Hardware begegnet werden kann. Mit dem Ziel der Entwicklung einer solchen Hardware auf Basis einer skalierbaren und flexibel programmierbaren Architekturplattform hat das IMS erfolgreich an der ZuSE-Ausschreibung des BMBF zu Themen der künstlichen Intelligenz teilgenommen. In der Rolle der Projektleitung arbeitet das Institut in einem Konsortium an einer Open-Source Vektorprozessorarchitektur, die sich besonders für ressourcenintensive KI-Algorithmen eignet. Durch die vertikale Verarbeitung von Datenvektoren und komplexe Adressierungsmodi können neuronale Netze effizient berechnet werden. Für den Einsatz als Embedded-IP-Core in kommerziellen SoCs werden zudem Aspekte der funktionalen Sicherheit und IP-Security betrachtet. Auch die Entwicklung eines Compilers und eines effizienten Speichercontroller sind Teil des Projektes ZuSE-KI-AVF. Das IMS entwickelt an der Systemarchitektur, der Konzeption und Implementation von Algorithmen wie der Verarbeitung von Lidar-Punktwolken sowie einer Demonstration der Architektur auf Basis einer FPGA-Beschreibung.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: M.Sc. Sven Gesper, M.Sc. Oliver Renke, M.Sc. Christoph Riggers, M.Sc. Gia Bao Thieu
    Year: 2020
    Sponsors: BMBF
    Lifespan: Oktober 2020 - September 2023
  • Multi-Energy Harvesting (MEH) - A Flexible Platform for Energy Harvesting in Home Automation
    In this project, a platform concept for intelligent home automation components is developed, which can serve as a basis for next-generation sensors and actors. The main characteristic of this platform concept is ultra-low power consumption and ultra-low voltage operation. In combination with harvested energy from multiple sources (multi-energy harvesting), an extended lifetime and reduced battery cell requirements become possible compared to current systems.
    Leaders: Prof. Dr.-Ing. H. Blume, Prof. Dr.-Ing. B. Wicht, apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: M.Sc. Moritz Weißbrich, M.Sc. Lars-Christian Kähler
    Year: 2019
    Sponsors: BMBF
    Lifespan: October 2018 - March 2021
  • CHORUS
    A highly optimized hardware/software module library for intelligent sensor systems in highly automated driver assistance applications based on the reconfigurable Dream Chip Technologies DCT10A SoM platform
    Leaders: Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: M.Sc. Sven Gesper
    Year: 2018
    Sponsors: BMWi
    Lifespan: 01.11.2018 - 31.03.2021
  • Smart Hearing Aid Processor (Smart HeaP)
    In the Smart Hearing Aid Processor (Smart HeaP) project, a novel hearing aid processor is designed, developed and built which, despite its simple programmability and wireless Bluetooth interface, is characterized by low power consumption and high computing power.
    Leaders: Prof. Dr.-Ing. H. Blume, apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: Dipl.-Ing. L. Gerlach, M.Sc. J. Karrenbauer
    Year: 2018
    Sponsors: BMBF
    Lifespan: April 2018 - April 2021
  • Design of a Configurable, Massive-Parallel Vector Processor Architecture for Computer Vision and a Framework for the Implementation of Object Recognition Applications for Embedded Systems
    The increasing complexity of current computer vision algorithms for autonomous driving, such as object detection and classification using neural networks, represents a challenge for automotive system designers. Providing a real-time processing system under hard real-time constraints and a low energy (budget a few watts) is difficult to achieve even with current technical platforms. The goal of this project is to design a new approach of application-specific vector processor for FPGA implementation. The well-known overhead of other platforms (e.g. GPUs) shall be avoided by using several strategies: Novel functional mechanisms, a modular and customizable architecture and a suitable development framework, which is especially designed for the implementation of automotive applications.). An FPGA-based prototype will demonstrate the performance of the vector processor concept for a selected application at the end of the project.
    Leaders: apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach
    Year: 2016
    Lifespan: Mai 2016 - Oktober 2017
  • TETRACOM
    Nowadays, continuous development of digital signal processing applications, e.g., video-based advanced driver assistance systems, are pushing the limits of existing embedded systems and are forcing system developers to spend more time on code optimization. These applications often involve complex mathematical functions like trigonometric, logarithmic, exponential, or square root operations. In particular, these functions can only efficiently be computed on standard general purpose embedded processors, using highly optimized, processor specific arithmetic evaluation software libraries. Another alternative is to extend the embedded processor architectures with a specific hardware accelerator.
    Leaders: Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach
    Year: 2016
    Lifespan: January 2016 - July 2016
  • Hearing4All
    The joint venture "Hearing4all" that the IMS-AS participates in with multiple sub-projects, has been chosen as one of the federal cluster of excellence projects Friday June 15th 2012. In the scope of this project the IMS-AS aims to develop high-performance and low-power processor architectures for digital hearing systems, such as cochlear implants or hearing aids.
    Leaders: Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: M.Sc. C. Seifert, Dipl.-Ing. L. Gerlach
    Year: 2015
    Lifespan: November 2012 - December 2018
  • Stochastic Processor
    Stochastic computing has recently emerged as a promising approach for designing energy-efficient embedded hardware systems, taking into account the ability of many applications (e.g., computer vision) to tolerate the loss of precision in the computed results. Rather than designing the hardware for worst case scenarios featuring expensive guard-bands, designers can relax the implementation constraints and deliberately expose hardware variability, obtaining significant processing performance improvements and energy benefits.
    Leaders: Jun.-Prof. Dr.-Ing. G. Payá-Vayá, Prof. Dr.-Ing. Holger Blume
    Team: M.Sc. Moritz Weißbrich
    Year: 2015
    Sponsors: Deutsche Forschungsgemeinschaft (DFG)
    Lifespan: February 2016 - January 2019
  • High Temperature Measurement While Drilling
    The goal of the research is an MWD processor system for drilling tools used for geothermal drilling in ambient temperatures up to 300 °C. The processing of the project includes research aspects in the fields of hardware design, fault tolerance of digital systems and ASIC design.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Ing. Rochus Nowosielski
    Year: 2014
    Lifespan: 2012-2014
  • GEBO - High Temperature Electronic
    In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Ing. Rochus Nowosielski
    Year: 2014
    Lifespan: 2009-20111
  • RAPANUI - Rapid-Prototyping for Media Processor Architecture Exploration
    Design, implementation, and evaluation of a prototyping-based Designmethodology for processor architectures for digital signal processing.
    Leaders: Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: M. Sc. Florian Giesemann
    Year: 2014
  • OPARO
    In the development of integrated, programmable circuits, the optimization of power dissipation and temperature distribution is becoming increasingly important. So far, however, these can only be determined by very time-consuming simulations. Therefore, precise models for the determination of power dissipation shall be developed and mapped together with the functional emulation on FPGAs. By accelerating the determination of power dissipation and temperature distribution, specific optimizations of the architecture and the application code can then be made taking real input data into account.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Wirtsch.-Ing. Sebastian Hesselbarth
    Year: 2014

Reconfigurable Architectures

  • Design of a Configurable, Massive-Parallel Vector Processor Architecture for Computer Vision and a Framework for the Implementation of Object Recognition Applications for Embedded Systems
    The increasing complexity of current computer vision algorithms for autonomous driving, such as object detection and classification using neural networks, represents a challenge for automotive system designers. Providing a real-time processing system under hard real-time constraints and a low energy (budget a few watts) is difficult to achieve even with current technical platforms. The goal of this project is to design a new approach of application-specific vector processor for FPGA implementation. The well-known overhead of other platforms (e.g. GPUs) shall be avoided by using several strategies: Novel functional mechanisms, a modular and customizable architecture and a suitable development framework, which is especially designed for the implementation of automotive applications.). An FPGA-based prototype will demonstrate the performance of the vector processor concept for a selected application at the end of the project.
    Leaders: apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach
    Year: 2016
    Lifespan: Mai 2016 - Oktober 2017
  • TUKUTURI
    In the TUKUTURI-project, a for ASIC-synthesis optimized VHDL-description of a soft core processor architecture will be optimized for FPGA synthesis. The suitability of special functional units for specific applications with regard to performance and area consumption will be analyzed.
    Leaders: Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: M. Sc. Florian Giesemann
    Year: 2014
    Sponsors: Wege in die Forschung II
  • Circuit Design and Physical Design for a Novel FPGA Architecture
    Evaluation and analysis of the implemtability and performance of a new type of field programmable gate array (FPGA).
    Leaders: Prof. Dr.-Ing. H. Blume, apl. Prof. Dr.-Ing. G. Payá Vayá
    Team: B. Bredthauer, C. Spindeldreier
    Year: 2013
    Sponsors: Federal Ministry of Education and Reserach
    Lifespan: May 2013 - June 2014

System Design

  • ZuSE-KI-mobil
    Für Zukunftsaufgaben wie das autonome Fahren oder Industrie 4.0 müssen immer größere Mengen an Daten von einer steigenden Anzahl von Sensoren mit Hilfe komplexer Algorithmen und künstlicher Intelligenz (KI) in kürzester Zeit analysiert werden. Die entsprechenden Prozessoren müssen aber nicht nur bei der Rechenleistung, sondern auch hinsichtlich Energieeffizienz, Zuverlässigkeit, Robustheit und Sicherheit hohe Anforderungen erfüllen, die über aktuelle Möglichkeiten weit hinausgehen. Die ZuSE-Projekte des BMBF sollen den dringenden Bedarf der Anwenderbranchen an zukunftsfähigen, vertrauenswürdigen Prozessoren decken, die auf ihre spezifischen Aufgaben zugeschnitten und hoch performant sind. Ziel des Vorhabens ist die Entwicklung einer Prozessorplattform für die Entwicklung hoch performanter Elektronik für rechenintensive KI-Anwendungen. Als Kernkomponente wird ein KI-Beschleuniger mit einer flexiblen, erweiterbaren und skalierbaren System-on-Chip –Architektur (SoC) entwickelt. Um einen niedrigen Energieverbrauch zu erreichen, wird der Beschleuniger für KI-Algorithmen im Bereich des autonomen Fahrens optimiert und in der energieeffizienten 22-nm-FDX-Halbleitertechnologie gefertigt. Darüber hinaus wird ein Ökosystem aufgebaut, das ein Entwicklungssystem sowie ein deutsches Partnernetzwerk mit Know-how im KI-Hardware-Entwurf vereint. Die Flexibilität und Skalierbarkeit der Leistungsdaten der Prozessorplattform wird anhand von Demonstratoren verifiziert. Der rechenstarke KI-Beschleuniger, die flexible und skalierbare SoC-Architektur sowie das Ökosystem bilden eine Plattform für die kostengünstige Entwicklung anwendungsspezifischer KI-Hardware in Deutschland und sind für zukünftige Innovationen breit einsetzbar.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Matthias Lüders, M.Sc., Nicolai Behmann, M.Sc.
    Year: 2020
    Sponsors: BMBF
    Lifespan: Mai 2020 - April 2023
  • BECCAL-I
    Scope of the bilateral BECCAL-I of DLR and NASA is the design of a platform for atom optic experiments on board of the international spece station. Within the project the Institute of Microelectronic Systems will develop and evaluate platforms and algorithms for digital signal processing in space.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: M.Sc. Tim Oberschulte
    Year: 2018
    Sponsors: "National Space Program" of the Federal Ministry for Economic Affairs and Energy (BMWi)
    Lifespan: August 2018 - Dezember 2021
  • Efficient Real-time Processing of EEG-Signals
    A brain-computer interface (BCI) is a system that generates signals to control an artificial system based on measurements of the activity of the central nervous system, for example, to replace, enhance or supplement certain tasks of human action. Modern BCIs are often based on the decoding or interpretation of EEG signals, as such systems are both non-invasive and cost-effectively available. These sensors detect a variety of independent, superimposed signals that make their immediate use for controlling a digital system difficult. Therefore, each application and corresponding application environment requires specifically designed and customized algorithms. This project therefore investigates methods for the efficient real-time processing of EEG signals. For this purpose, the Institute of Microelectronic Systems is developing a complete system of dedicated, configurable hardware in combination with a signal-processing framework specially adapted for the processing of EEG signals.
    Leaders: Prof. Dr.-Ing. Holger Blume, Jun.-Prof. Dr.-Ing. G. Payá-Vayá
    Team: Marc-Nils Wahalla, Dipl.-Ing.
    Year: 2017
  • ZIM D-Sense - Development of a Testing System for the Diagnosis of Sensorimotor Regulation Abilities in Athletes
    The aim of the project is to develop a mobile diagnostics system which can be used to to assess the sensorimotor regulation abilities in athletes. The system should consist of multiple sensor units and allow the athlete or coach to quickly and precisely perform different functional sensorimotor tests. The sensor units can be placed at different points on or next to the subject's body, depending on the concrete test being performed. Also depending on the test, different algorithms are to be used for classifying and evaluating the measurements from the sensor units. A database helps the user to interpret the test results and provides reference values for risk assessments regarding injuries.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: M.Sc. Fritz Webering
    Year: 2017
    Sponsors: „Zentrales Innovationsprogramm Mittelstand“ of the BMWi - Federal Ministry for Economic Affairs and Energy
    Lifespan: 2017-2019
  • TETRACOM - Mobile platform for real-time sonification of movements for medical rehabilitation
    The rehabilitation of stroke patients is an intense and lengthy process. The common therapy approach is based on movement training in presence of a therapist. Through many repetitions a remobilization of the patient is achieved. Due to this highly time‐consuming treatment, the costs of for the therapy are very high. Therefore, in this research project, we are focusing on the design of a mobile system, which will provide a motion feedback by means of sonification. It will enable therapist‐independent training and as a result lessen the strain on patient and healthcare system.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: M.Sc. Daniel Pfefferkorn
    Year: 2016
    Sponsors: FP7 ‐ ICT ‐ 2013 ‐ 10
    Lifespan: September 2013 - August 2016
  • Architekturen und Algorithmen für Hochtemperatur-Signalverarbeitung
    In dem kooperativen Industrieprojekt entstehen zusammen mit der Firma Baker Hughes Architekturen für das Einsatzgebiet der Hochtemperatur-Elektronik. Ein besonderer Schwerpunkt ist hierbei die Erforschung von Kommunikations-Algorithmen für dieses Einsatzgebiet.
    Leaders: Prof. Dr.-Ing. habil H. Blume
    Team: M.Sc. Tobias Volkmar
    Year: 2016
  • Untersuchung zur Simulation von Bauelementen und Komponenten für die Entwicklung strahlenrobuster autonomer Systeme
    Im Zuge der Miniaturisierung moderner integrierter Schaltungen verändert sich die Strahlenhärte der Systeme und Komponenten. Daraus resultierend ist es notwendig, die die Strahlenhärte beeinflussenden Mechanismen im Halbleiter zu bestimmen.
    Leaders: PD Dr.-Ing. Dipl.-Phys. Kirsten Weide-Zaage
    Year: 2015
    Lifespan: 01.02.2015-31.12.2017
  • Component reliability in high temperature automotive applications (Rely)
    Thermisch-elektrisch-mechanische Simulation, Degradationsmodellierung auf Device-Level
    Leaders: PD Dr.-Ing. Dipl.-Phys. K. Weide-Zaage
    Team: Dipl.-Ing. Jörg Kludt
    Year: 2014
    Lifespan: 01.05.2011-30.04.2013
  • QUANTUS IV - MAIUS
    The Institute of Microelectronic Systems supports physical experiments in space in the QUANTUS IV - MAIUS Project. Within the project platforms and algorithms for digital signal processing in space will be delevoped and evaluated.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: Dipl.-Ing. Christian Spindeldreier
    Year: 2014
    Sponsors: "National Space Program" of the Federal Ministry for Economic Affairs and Energy (BMWi)
    Lifespan: August 2014 - December 2021
  • GEBO - High Temperature Electronic
    In this project, the design of mixed-signal circuits for signal processing is studied under high temperature conditions. For this, research on analog circuits and digital signal processing architectures will be conducted in order to adapt common design approaches to the requirements of high temperature technology.
    Leaders: Prof. Dr.-Ing. H. Blume
    Team: Dipl.-Ing. Rochus Nowosielski
    Year: 2014
    Lifespan: 2009-20111
  • Site-optimized Wireless Communication Architectures
    The communication parameters to be expected in an application scenario result from the combination of the employed standards' properties (IEEE 802.11, BLE, IEEE 802.154, ZigBee) and the specific radio wave propagation conditions of the considered building.
    Leaders: Prof. Dr.-Ing. Holger Blume
    Team: M.Sc. Daniel Pfefferkorn
    Year: 2014