OPARO

While FPGA emulation has become indispensable for functional optimization and verification, power dissipation and temperature distribution of integrated circuits can only be determined by very complex simulations.
Due to the high computing time for these simulations, especially in consideration of real application scenarios, only limited comprehensive, iterative optimizations with regard to power dissipation and heat distribution can be carried out.
The aim of this project is therefore to develop precise models for the determination of power dissipation which are suitable to be mapped to FPGAs and which continuously generate power dissipation values of the actual processors during the functional emulation. In addition, the models should show a high accuracy with regard to the power dissipation values and the time course of the power dissipation compared to the power loss determination by simulation. Based on the emulation of power dissipation models, it will be investigated whether FPGA-based emulation can also be used for the determination of temperature distribution boards of processors.