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Logo: Institut für Mikroelektronische Systeme
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Projekte von Dipl.-Ing. Stephan Nolting

Prozessorarchitekturen

TETRACOM

Bild zum Projekt TETRACOM

Leitung:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Bearbeitung:

Dipl.-Ing. S. Nolting, Dipl.-Ing. L. Gerlach

Laufzeit:

Januar 2016 - Juli 2016

Kurzbeschreibung:

Nowadays, continuous development of digital signal processing applications, e.g., video-based advanced driver assistance systems, are pushing the limits of existing embedded systems and are forcing system developers to spend more time on code optimization. These applications often involve complex mathematical functions like trigonometric, logarithmic, exponential, or square root operations. In particular, these functions can only efficiently be computed on standard general purpose embedded processors, using highly optimized, processor specific arithmetic evaluation software libraries. Another alternative is to extend the embedded processor architectures with a specific hardware accelerator.

 

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