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Logo: Institute of Microelectronic Systems
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Logo: Institute of Microelectronic Systems
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Journal Contributions

Dalleau, D.; Weide-Zaage, K.; Danto, Y. (2003): Simulation of time depending void formation in copper, aluminum and tungsten plugged via structures, Microelectronics Reliability, Vol. 43, Pages 1821-1826.
DOI: 10.1016/S0026-2714(03)00310-X

Weide-Zaage, K.; Dalleau, D.; Yu, X. (2003): Stationary and dynamic analysis of failure locations and void formation in interconnects due to the different migration mechanisms, Materials Science in Semiconductor Processing 6, Volume 6, Issues 1–3, Pages 85-92
DOI: 10.1016/S1369-8001(03)00075-1

Conference Contributions

Berekovic, M.; Flügel, S.; Stolberg, -.; Friebe, L.; Moch, S.; Kulaczewski, B.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core Architecture for Image and Video Applications, Proceedings ICIP2003, IEEE, Piscataway, NJ (101-104)
ISBN: 0780377508

Berekovic, M.; Moch, S.; Pirsch, P. (2003): A Scalable, Clustered SMT Processor for Digital Signal Processing, Medea Workshop (in conjunction with PACT)

Blume, H.; Kannengiesser, S.; Noll,, G. (2003): Image Quality Enhancement for MRT Images, Proceedings of the ProRISC Workshop

Blume, H.; Livonius, v.; Noll, G. (2003): Segmentation in the Loop - Ein iteratives, objektunterstütztes Verfahren zur Bewegungsschätzung, Proceedings der ITG-Fachtagung "Elektronische Medien", (159-164)

Cerda, J.; Gadea, R.; Payá-Vayá, G. (2003): Implementing a Margolus Neighborhood Cellular Automata on a FPGA, 7th International Work-Conference on Artificial and Natural Neural Networks (IWANN'03), LNCS - Artificial Neural Nets Problem Solving Methods(2687), Springer Berlin / Heidelberg (121-128)
DOI: 10.1007/3-540-44869-1_16
ISBN: 978-3-540-40211-4

Friebe, L.; Stolberg, -.; Berekovic, M.; Moch, S.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A System-on-Chip Architecture with Two Multimedia DSPs and a RISC Core, IEEE International SOC Conference, IEEE, Piscataway, NJ (85-88)
ISBN: 0780381823

Gehrke, W.; Jachalsky, J.; Wahle, M.; Kruijtzer, W.; Alba, C.; Sethuraman, R. (2003): Flexible Coprocessor Architectures for Ambient Intelligent Applications in the Mobile Communication and Automotive Domain, VLSI Circuits and Systems, Proceedings of SPIE, Volume 5117, SPIE, Bellingham, WA (310-320)
ISBN: 0819449776

Hermann, A.; Olbrich, M.; Barke, E. (2003): Placing Substrate Contacts into Mixed-Signal Circuits Controlling Circuit Performance, Proc. Of 25th IEEE Custom Integrated Circuits Conference, (373-376)

Hermann, A.; Olbrich, M.; Barke, E. (2003): Substrate Modeling and Noise Reduction in Mixed-Signal Circuits, Proc. of IFIP VLSI SoC, Darmstadt (13-18)
ISBN: 3901882170

Jachalsky, J.; Wahle, M.; Pirsch, P.; Capperon, S.; Gehrke, W.; Kruijtzer, M.; Nuñez, A. (2003): A Core for Ambient and Mobile Intelligent Imaging Applications, Proceedings of the 2003 IEEE International Conference on Multimedia & Expo (ICME 2003), IEEE Press, Piscataway, NJ (CDROM)
ISBN: 0780379667

Kaya, I.; Olbrich, M.; Barke, E. (2003): 3-D Placement Considering Vertical Interconnects, Proceedings of the IEEE International SOC Conference, (257-258)
ISBN: 0780381823

Langemeyer, S.; Kloos, H.; Simon-Klar, C.; Friebe, L.; Hinrichs, W.; Lieske, H.; Pirsch, P. (2003): A Compact and Flexible Multi-DSP System for Real-Time SAR Applications, Proceedings IGARSS2003, IEEE (CD-ROM)
ISBN: 0780379306

Lemke, A.; Hedrich, L.; Barke, E. (2003): Dimensionierung analoger Schaltungen mit formalen Methoden, 7. ITG/GMM-Diskussionssitzung Entwicklung von Analogschaltungen mit CAE-Methoden, VDE-Verlag, Berlin (135-140)
ISBN: 3-8007-2778-1

Malonnek, C.; Olbrich, M.; Barke, E. (2003): Ein neues Platzierungsverfahren für einen leitbahnzentrierten Designflow, E.I.S.-Workshop, VDE VERLAG GmbH (151-156)
ISBN: 3800727609

Moch, S.; Berekovic, M.; Stolberg, -.; Friebe, L.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core Architecture for Image and Video Applications, Proceedings MEDEA Workshop at The Twelfth International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), (57-63)

Neumann, B.; Blume, H.; Feldkämper, H.; Noll,, G. (2003): Embedded FPGA-Architekturen für Multimedia-Applikationen, Proceedings der ITG-Fachtagung "Elektronische Medien", (147-152)

Neumann, B.; Feldkämper, H.; Blume, H.; Noll, G. (2003): Application Domain Specific Embedded FPGAs, Proceedings of the DSP Design Workshop 2003

Patino, M.; Peiro, M.; Ballester, F.; Payá-Vayá, G. (2003): Evaluation of 2D-DCT Architecture for FPGA, XVIII Conference on Design of Circuits and Integrated Systems (DCIS 2003), IEEE (557-561)
ISBN: 84-87087-40-X

Payá-Vayá, G.; Peiro, M.; Ballester, F.; Gadea, R.; Colom, R. (2003): New Distributed Arithmetic Discrete Wavelet Packet Transform Architecture, VLSI Circuits and Systems, SPIE International Symposium on Microtechnologies for the New Millennium, 5117, Jose F. Lopez, Juan A. Montiel-Nelson, and Dimitris Pavlidis, SPIE (370-378)
DOI: 10.1117/12.499056
ISBN: 0-8194-4977-6

Payá-Vayá, G.; Peiro, M.; Ballester, F.; Herrero, V.; Colom, R. (2003): New Lifting Folded Pipelined Discrete Wavelet Transform Architecture, VLSI Circuits and Systems, SPIE International Symposium on Microtechnologies for the New Millennium, 5117, Jose F. Lopez, Juan A. Montiel-Nelson, and Dimitris Pavlidis, SPIE (351-360)
DOI: 10.1117/12.499049
ISBN: 0-8194-4977-6

Payá-Vayá, G.; Peiro, M.; Ballester, F.; Herrero, V.; Mora, F. (2003): Lifting Folded Pipelined Discrete Wavelet Packet Transform Architecture, VLSI Circuits and Systems, SPIE International Symposium on Microtechnologies for the New Millennium, 5117, Jose F. Lopez, Juan A. Montiel-Nelson, and Dimitris Pavlidis, SPIE (312-328)
DOI: 10.1117/12.498992
ISBN: 0-8194-4977-6

Payá-Vayá, G.; Peiró, M.; Ballester, F.; Mora, F. (2003): Fully Parameterized Discrete Wavelet Packet Transform Architecture Oriented to FPGA, 13th International Conference on Field Programmable Logic and Application (FPL 2003), LNCS 2778, Springer Berlin / Heidelberg (533-542)
DOI: 10.1007/978-3-540-45234-8_52
ISBN: 978-3-540-40822-2

Payá-Vayá, G.; Peiro, M.; Ballester, J.; Cerda, J. (2003): A New Inverse Discrete Wavelet Packet Transform Architecture, Proceedings of the Seventh International Symposium on Signal Processing and Its Applications (ISSPA'03), II, IEEE (443-446)
DOI: 10.1109/ISSPA.2003.1224909
ISBN: 0-7803-7946-2

Pirsch, P.; Berekovic, M.; Stolberg, -.; Jachalsky, J. (2003): VLSI Architectures for MPEG-4, Proc. 2003 International Symposium on VLSI Technology, Systems, and Applications, IEEE Press, Piscataway, NJ (208-212)
ISBN: 0780377656

Reuter, C.; Martín, J.; Stolberg, -.; Pirsch, P. (2003): Performance Estimation of Streaming Media Applications for Reconfigurable Platforms, International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS Initiative, Leiden (Die Niederlanden) (42-45)
ISBN: 9080795712

Salewski, S.; Olbrich, M.; Barke, E. (2003): LIFT: Ein Multi-Layer IC Floorplanning Tool, 11. E.I.S.-Workshop: Entwurf Integrierter Schaltungen und Systeme, VDE Verlag GmbH (157-162)
ISBN: 3800727609

Schneider, M.; Blume, H.; Noll, G. (2003): Verlustleistungsschätzung auf funktionaler Ebene für programmierbare Prozessoren, Proceedings der URSI Kleinheubacher Tagung 2003

Sherstnov, O.; Blume, H.; Noll, G. (2003): Verlustleistungsmodelle für Algorithmen zur Bewegungsschätzung auf FPGAs, Proceedings der URSI Kleinheubacher Tagung 2003

Stolberg, -.; Berekovic, M.; Friebe, L.; Moch, S.; Flügel, S.; Mao, X.; Kulaczewski, B.; Klußmann, H.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications, Proceedings Design, Automation and Test in Europe (DATE2003) - Designer's Forum, IEEE, Piscataway, NJ (8-13)
ISBN: 0769518702

Stolberg, -.; Berekovic, M.; Friebe, L.; Moch, S.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing, Proceedings 2003 IEEE Workshop on Signal Processing Systems, IEEE, Piscataway, NJ (189-194)
ISBN: 0780377958

Stolberg, -.; Berekovic, M.; Friebe, L.; Moch, S.; Kulaczewski, B.; Dehnhardt, A.; Pirsch, P. (2003): HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing, Proceedings 2003 IFIP International Conference on Very Large Scale Integration (VLSI-SoC), Technische Universität Darmstadt, Institute of Microelectronic Systems (155-160)
ISBN: 3901882170

PhD Theses

Harbich, K. (2003): A Timing-Driven RTL-Based Design Flow for Multi-FPGA Rapid Prototyping Systems, VDI Verlag GmbH, Düsseldorf

Hilgenstock, J. (2003): Selbstkalibrierende mesochrone Taktung für global-asynchrone lokal-synchrone Schaltungen, Fortschritt-Berichte VDI, 9(366), VDI-Verlag GmbH, Düsseldorf
ISBN: 3183366096

Lieske, H. (2003): Buspipelining als Architekturmaßnahme zur Überwindung von Problemen beim Einsatz in der Deep Subµ-Technologie, Fortschritt-Berichte VDI, 9(370), VDI-Verlag GmbH, Düsseldorf
ISBN: 3183370093

Silvant, M. (2003): Multilevel Substrate Modeling for Mixed-Technology and Mixed-Signal Integrated Circuits, VDI Verlag GmbH, Düsseldorf