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Logo: Institute of Microelectronic Systems
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Processor Architectures

Multi-Energy Harvesting (MEH) - A Flexible Platform for Energy Harvesting in Home Automation

Bild zum Projekt Multi-Energy Harvesting (MEH) - Flexible Plattform für Energiesammelsysteme für die Gebäudeautomation

Supervisor:

Prof. Dr.-Ing. H. Blume, Prof. Dr.-Ing. B. Wicht, Jun.-Prof. Dr.-Ing. G. Payá Vayá

Researcher:

M.Sc. Moritz Weißbrich, M.Sc. Lars-Christian Kähler

Duration:

October 2018 - March 2021

Funded by:

BMBF

Brief description:

In this project, a platform concept for intelligent home automation components is developed, which can serve as a basis for next-generation sensors and actors. The main characteristic of this platform concept is ultra-low power consumption and ultra-low voltage operation. In combination with harvested energy from multiple sources (multi-energy harvesting), an extended lifetime and reduced battery cell requirements become possible compared to current systems.

 

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Smart Hearing Aid Processor (Smart HeaP)

Bild zum Projekt Smart Hearing Aid Processor (Smart HeaP)

Supervisor:

Prof. Dr.-Ing. H. Blume, Jun.-Prof. Dr.-Ing. Guillermo Payá Vayá

Researcher:

Dipl.-Ing. L. Gerlach, M.Sc. J. Karrenbauer

Duration:

April 2018 - April 2021

Funded by:

BMBF

Brief description:

In the Smart Hearing Aid Processor (Smart HeaP) project, a novel hearing aid processor is designed, developed and built which, despite its simple programmability and wireless Bluetooth interface, is characterized by low power consumption and high computing power.

 

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CHORUS

Bild zum Projekt CHORUS

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Duration:

01.11.2018 - 31.03.2021

Funded by:

BMWi

Brief description:

A highly optimized hardware/software module library for intelligent sensor systems in highly automated driver assistance applications based on the reconfigurable Dream Chip Technologies DCT10A SoM platform

 

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Stochastic Processor

Bild zum Projekt Stochastic Processor

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá, Prof. Dr.-Ing. Holger Blume

Researcher:

M.Sc. Moritz Weißbrich

Duration:

February 2016 - January 2019

Funded by:

Deutsche Forschungsgemeinschaft (DFG)

Brief description:

Stochastic computing has recently emerged as a promising approach for designing energy-efficient embedded hardware systems, taking into account the ability of many applications (e.g., computer vision) to tolerate the loss of precision in the computed results. Rather than designing the hardware for worst case scenarios featuring expensive guard-bands, designers can relax the implementation constraints and deliberately expose hardware variability, obtaining significant processing performance improvements and energy benefits.

 

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RAPANUI - Rapid-Prototyping for Media Processor Architecture Exploration

 

Supervisor:

Jun.-Prof. Dr.-Ing. G. Payá-Vayá

Researcher:

M. Sc. Florian Giesemann

Brief description:

Design, implementation, and evaluation of a prototyping-based Designmethodology for processor architectures for digital signal processing.

 

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