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Logo: Institute of Microelectronic Systems
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Logo: Institute of Microelectronic Systems
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Tensilica Day 2017

Cadence Design Systems and the Institute of Microelectronic Systems have invited to the second Tensilica Day on 16th February 2017. Theme for the workshop have been processors with an application-specific instruction-set extension (ASIP) in actual research.


The workshop, started with a tutorial by Marcus Binning, Senior Application Engineer Manager at Cadence Designs Systems, about how to extend Tensilica processors with customized instructions. The morning session was completed by Jeroen Domburg, Software Manager and Technical Marketing Manager at Espressif Systems, with the presentation of the Espressif ESP32 chip, which is based on the Tensilica L106 processor.


In the second part of the event, experts from university and industry have presented current trends in ASIP design. During the lunch break, there was the opportunity have a look at various hardware demonstrators. This years’ special highlight of hardware demonstrators was the HoloLens, which consists of 24 Tensilica DPS.

The next Tensilica Day will take place in February 2018, again with Cadence Tensilica and the Institute of Microelectronic Systems.

 


The agenda of the workshop can be found here.


 


Newsfeed to the Cadence Academic Network Blog.


 


Session 1 - Tutorials

M. Binning (Cadence): Modular TIE – Adding Custom Instructions to Different Base Cores pdf

J. Domburg (Espressif): IoT on the Cheap: How Espressif leverages Xtensa Cores (N/A)

 

Session on ASIP-Case Studies I

S. Wallentowitz (LibreCores): The State of Open Source Processors and Open Source Silicon pdf

P. Jääskeläinen (TUT): Co-Design of Programmable Exposed Datapath Processors pdf

O. Navarro (RUB): Run Time Adaptive Cache Architectures pdf

 

Session on ASIP-Case Studies II

G. Payá Vayá (LUH): Improving the Processing Performance of a DSP for High Temperature Electronics using Circuit-Level Timing Speculation (N/A)

J. Benndorf (Dream Chip): A New Image Processor Chip Design for Automotive ADAS CNN Applications pdf

N. Behmann (LUH): High-Performance, Energy-efficient Computer Vision for ADAS on Tensilica Vision P6 pdf

 

Session on ASIP-Case Studies III

S. Haas (TUD): An Application-Specific Instruction-Set Processor for Database Operators pdf

A. Bytyn (RWTH): ASIP Design for Hybrid Beamforming in mm-Wave MIMO Frequency Selective Channels (N/A)

L. Gerlach (LUH): Low-Power Optimization of a VLIW-SIMD ASIP for Hearing Aid Devices pdf


 


Information about the Tensilica Day 2016 can be found here.