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Logo: Institute of Microelectronic Systems
Logo Leibniz Universität Hannover
Logo: Institute of Microelectronic Systems
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Tensilica Day 2019

Cadence Design Systems and the Institute of Microelectronic Systems invite to the fourth Tensilica Day on 23rd - 24th September 2019. The theme for the workshop are processors with an application-specific instruction-set extension (ASIP) in current academic and industrial research. Due to the high interest, the workshop is extended to one and a half day in 2019.


The workshop starts with a tutorial by Cadence Designs Systems, about how to extend Tensilica processors with customized instructions. Subsequent, experts from university and industry present current trends in ASIP design. During the lunch break, there is the opportunity to have a look at various hardware demonstrators. Additionally, the Protium FPGA prototyping platform is presented with an emulation of the Tensilica IVP DSP and a camera-based pedestrian detection algorithm. A main topic of this years Tensilica Day are HW-Design, SW-Tools and their Co-Design for Deep Learning ASIPs.

Location

This years Tensilica Day 2019 will be hosted in the "Royal Horse Stable" of the Leibniz University Hannover, Appelstr. 7, 30167 Hannover. Sufficient parking facilities are available in the immediate vicinity.

Registration

Please register, free of cost, under this link

Agenda Day 1 (23. September 2019)

Welcome & Introduction

14:00

Welcome
Holger Blume, Institute of Microelectronic Systems, LU Hannover

14:15

Tensilica 2019. What’s New?
Cadence

Coffee Break

Session 1 Neural Network Acceleration

15:15

Configurable Processing Elements for Flexible Acceleration of Variable Precision Neural Networks
Nael Al-Fasfous, Chair of Integrated Systems, TU Munich

15:45

CNN Inference on Coarse-Grain Reconfigurable Arrays under Throughput Constraints.
Christian Heidorn, Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-University Erlangen-Nürnberg (FAU)

16:15

A Power Efficient Network Coding Accelerator
Mattis Hasler, Vodafone Chair, Mobile Communication Systems, TU Dresden

Coffee Break

Session 2 Theory & Software Tooling

17:00

Exploration of Memory Energy-Reduction Strategies for a Deep Learning ASIP
Lennart Reimann, Institute for Communication Technologies & Embedded Systems, RWTH Aachen

17:30

Evaluation and optimization of a Tensilica processor for hearing aids
Jens Karrenbauer, Institute of Microelectronic Systems, LU Hannover

Welcome Reception & Networking (18:00-20:00)

Agenda Day 2 (24. September 2019)

Welcome & Introduction 9:00

9:00

Welcome
Holger Blume, Institute of Microelectronic Systems, LU Hannover

9:15

Emulation Tutorial 
Cadence

Coffee Break

Session 3 Industrial ASIP Applications

10:30

New general purpose FPGA with novel architecture
Michael Gude, Cologne Chip

11:00

Structure from motion on Tensilica Vison P6
Christoph Heinrichs, Dream Chip Technologies GmbH

11:30

A unified visual computing platform
Hans-Joachim Stolberg, videantis GmbH

Lunch and Trends

Keynote

13:00

Next Generation Neuro Science Simulation Systems
Tobias G. Noll, Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen

Coffee Break

Session 4 ASIP Case-Studies I

14:00

Towards more adaptive accelerators: An approach utilizing the Tensilica LX7 ASIP
Florian Fricke, Chair of Computer Engineering, BTU Cottbus

14:30

InterSloth: Global Hardware-Based Scheduling in a Multi-Core RTOS on RISC-V
Christian Dietrich, Systems Research and Architecture Group, LU Hannover

15:00

Energy Efficient GFDM Accelerator for Users Devices
Robert Wittig, Vodafone Chair, Mobile Communication Systems, TU Dresden

Coffee Break

Session 5 ASIP Case-Studies II

15:45

Application Specific Memory Controller
Norbert Wehn, Division of Microelectronic Systems Design, TU Kaiserslautern

16:15

Application-Specific Soft-Core Vector Processor for Advanced Driver
Guillermo Payá Vayá, Institute of Microelectronic Systems, LU Hannover

16:45

t.b.a.
Alberto Garcia-Ortiz, Chair for Integrated Digital Systems, TU Bremen

Closing (17:15-17:30)

Agenda Download 

The agenda of the workshop can be downloaded here.

Tensilica Day History

Information about the Tensilica Day 2018 can be found here.

Information about the Tensilica Day 2017 can be found here.

Information about the Tensilica Day 2016 can be found here.