A flexible, fully configurable architecture for MPEG-2 video encoding

verfasst von

J. Jachalsky, M. Wahle, P. Pirsch, W. Gehrke

Abstract

This paper introduces a video encoder architecture for real-time MPEG-2 Main Profile at Main Level (MP@ML) encoding. It combines a programmable CPU for controlling with a fully configurable, but dedicated compression core. Therefore the encoder architecture offers a great processing flexibility at a high computational performance. One focal point of the paper is the motion estimation unit of the compression core that employs a highly efficient recursive block-matching motion estimation algorithm. To guarantee full memory bandwidth utilization the number of candidate blocks used for the block-matching process can be varied. The compression core was implemented in a 0.18pm 5 ML CMOS technology to run at 54 MHz. The architecture was thoroughly verified using hardware/software co-simulation.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Externe Organisation(en)

Philips HealthTech

Typ

Aufsatz in Konferenzband

Seiten

1063-1066

Anzahl der Seiten

4

Publikationsdatum

2002

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1109/ICECS.2002.1046434 (Zugang: Geschlossen)