Comparing vertical and horizontal SIMD vector processor architectures for accelerated image feature extraction

verfasst von

Moritz Weißbrich, A. García-Ortiz, Guillermo Payá-Vayá

Abstract

Embedded automotive Computer Vision systems for real-time motion tracking and 3D scene reconstruction demand for high image feature extraction performance and have a heavily constrained energy budget unable to be met by general-purpose CPUs and GPUs. Due to the required programming flexibility for software updates and algorithmic extensions, the use of fully dedicated hardware accelerators is not advisable in most cases. In this paper, a vertical and a horizontal SIMD vector processor architecture are implemented and compared for accelerating the Scale-Invariant Feature Transform feature extraction algorithm, exploiting inherent data-level parallelism prevalent in this application and considering different programming code strategies for the different vectorization paradigms. An evaluation for a 45 nm ASIC technology shows an overall performance gain of up to 24.8x, and up to 151.3x higher total performance-area-energy efficiency compared to a reference scalar two-issue VLIW processor. Compared to other implementations on programmable ASIP and mobile GPU platforms, the proposed vertical SIMD vector processor achieves a performance gain of up to 5.1x and up to 31.3x higher performance-energy efficiency.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Externe Organisation(en)

Universität Bremen

Typ

Artikel

Journal

Journal of Systems Architecture

Band

100

ISSN

1383-7621

Publikationsdatum

07.11.2019

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Software, Hardware und Architektur

Ziele für nachhaltige Entwicklung

SDG 7 – Erschwingliche und saubere Energie

Elektronische Version(en)

https://doi.org/10.1016/j.sysarc.2019.101647 (Zugang: Geschlossen)