Modeling substrate currents in smart power ICs

verfasst von

Joerg Oehmen, Markus Olbrich, Erich Barke

Abstract

Switching of power stages in smart power ICs, which drive an inductive load, turns on parasitic bipolar transistors and inject minority carriers into the substrate, which can affect the functionality of the chip. We present a new parasitic transistor model for post layout simulation, which accounts for a strongly inhomogeneous current flow, a base width of up to a few hundred μm, multiple base contacts and collectors, and whose parameters are easily extractable from layout and technology data.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Typ

Konferenzaufsatz in Fachzeitschrift

Journal

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Seiten

127-130

Anzahl der Seiten

4

ISSN

1063-6854

Publikationsdatum

2005

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Ingenieurwesen (insg.)