Time-Domain Ramped Gate Sensing for Embedded Multi-level Flash in Automotive Applications
- authored by
- Sebastian Kiesel, Thomas Kern, Bernhard Wicht
- Abstract
The advancing trend to autonomous driving tightens the requirements for automotive microcontrollers with embedded flash memories. High reliability and low latency demands however have prevented the broad usage of multilevel-cell flash in this sector so far. This paper describes a robust time-domain voltage sensing scheme tackling the challenges arising from these tight conditions. A dynamic voltage ramp is applied at the wordlines to operate the memory cells at optimum readout conditions. Thus a linearized transfer characteristic is achieved, which eases the cell state placement and reduces the effect of threshold shifts. A sense amplifier design with improved slope detection implemented in a 28 nm CMOS technology is presented. Simulations at nominal supply voltage 1.1 V Vdd show a 30% increased maximum read window compared to the former design.
- Organisation(s)
-
Institute of Microelectronic Systems
- External Organisation(s)
-
Technical University of Munich (TUM)
Infineon Technologies AG
- Type
- Conference contribution
- Pages
- 691-694
- No. of pages
- 4
- Publication date
- 2017
- Publication status
- Published
- Peer reviewed
- Yes
- ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials, Electrical and Electronic Engineering
- Electronic version(s)
-
https://doi.org/10.1109/MWSCAS.2017.8053017 (Access:
Closed)
