Memory efficient programmable processor for bitstream processing and entropy decoding of multiple-standard high-bitrate HDTV video bitstreams

authored by

N. Nolte, S. Moch, M. Kock, P. Pirsch

Abstract

Decoding of high bitrate video bitstreams is an application field traditionally claimed by dedicated hardware architectures, since embedded general purpose processors are not able to satisfy the high performance requirements of entropy decoding. We present a fully programmable multi-standard bitstream processor. The proposed bit granular memory and data path architecture provides efficient processing and storage capabilities for data words of arbitrary length. Running at a 300 MHz clock frequency, the processor is able to decode, e.g., MPEG-2 and VC-1 1080p HDTV bitstreams with a maximum bitrate of 100 Mbit/s.

Organisation(s)

Institute of Microelectronic Systems

External Organisation(s)

videantis GmbH

Type

Conference contribution

Pages

427-431

No. of pages

5

Publication date

2009

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

Hardware and Architecture, Electrical and Electronic Engineering

Electronic version(s)

https://doi.org/10.1109/SOCCON.2009.5398001 (Access: Closed)