Scalable multi-standard LSI texture encoder for MPEG and VC-1 video compression

authored by

N. Nolte, W. Gehrke, F. Wiczinowski, P. Pirsch

Abstract

Video encoding IP for home entertainment equipment and mobile devices is based on the same compression standards. However, performance and power efficient implementations for both application fields usually lead to independent hardware architectures and require separate implementation and maintenance. We introduce a new approach for a multistandard texture encoder for MPEG and VC-1 compression standards. The data path based architecture has been designed for scalability of performance and chip size without the requirement of manual hardware modifications. Using the maximum supported number of eight data paths running at 108 MHz, the texture encoder is able to process D1 video sequences.

Organisation(s)

Institute of Microelectronic Systems

External Organisation(s)

NXP Semiconductors N.V.

Type

Conference contribution

Pages

1187-1190

No. of pages

4

Publication date

2007

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

Computer Graphics and Computer-Aided Design, Software

Electronic version(s)

https://doi.org/10.1109/icme.2007.4284868 (Access: Closed)