Long, Short, Monolithic - The Gate Loop Challenge for GaN Drivers - Invited Paper.

authored by

Maik Kaufmann, Achim Seidel, Bernhard Wicht

Abstract

With fast switching GaN any parasitic gate loop inductance degrades the switching performance and may lead to false turn-on as well as gate voltage overshoot. Two approaches to overcome these challenges in driving GaN transistors are discussed in this paper. In a discrete silicon based driver, the gate loop inductance is actively utilized for a resonant gate drive approach. In a second implementation, the gate loop inductance is reduced close to zero by GaN-on-Si monolithic integration of the power transistor and the driver on one die. It includes an integrated supply voltage regulator circuit that generates the gate drive voltage out of the high-voltage switching node. The results show fast and robust switching behavior with minimal ringing.

Organisation(s)

Mixed-Signal Circuits Section

Type

Conference contribution

Pages

1-5

Publication date

2020

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

Electronic version(s)

https://doi.org/10.1109/cicc48029.2020.9075937 (Access: Closed)