Efficient and fast analysis of power distribution networks

authored by: Hedi Harizi, Horst Fischer, Markus Olbrich, Erich Barke
Abstract: As IC technology scales down, the metal width is decreasing, making the resistance along the power lines increase substantially. Together with the nonlinear scaling of the threshold voltage that makes the ratio of the threshold voltage to the supply voltage rise, the IR drop becomes a serious problem in modern VLSI design. Thus, the verification of the power distribution network is of critical importance to ensure reliable performance. However, with the increasing number of transistors on a chip, the complexity of the power network has grown. The available computational power and memory resources impose limitations on the size of the networks that can be analyzed using currently known techniques. In this paper, we present a fast and efficient method to analyse power distribution networks in the time-domain. The key concepts in our approach are a current source-based model and a voltage controlled resistor. The library elements are pre-characterized with respect to the modeling requirements and their models are used during the transient simulation. The new contribution of this work is the use of a Selection Approach (SA) to reduce the number of current source models and to speed up the characterization time. The SA is a function of the input pattern, the energy consumed by the library cells and the placement of the cells in the layout. The proposed techniques provide good analysis results compared to the reference with a reduction of the run-time by a factor of 400, although the cell pre-characterization is based on SPICE simulation. Our model is independent of power network parasitics, which implies that different power network scenarios may be analyzed based on the same model and the same cell characterizations. The run-time and accuracy of the proposed approach are demonstrated on some industrial designs.
Organisation(s): Mixed-Signal Circuits Section
External Organisation(s): Qimonda AG
Type: Conference contribution
Pages: 425-430
No. of pages: 6
Publication date: 16.12.2009
Publication status: Published
Peer reviewed: Yes
ASJC Scopus subject areas: Computer Networks and Communications, Computer Science Applications, Hardware and Architecture, Electrical and Electronic Engineering
Electronic version(s): https://doi.org/10.1109/ISIEA.2009.5356442 (Access: Unknown)