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Logo: Institut für Mikroelektronische Systeme
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Logo: Institut für Mikroelektronische Systeme
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Bücher

Payá-Vayá, G. (Ed.); Blume H. (Ed.) (2017): Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems weitere Informationen
DOI: 10.13052/rp-9788793519138
ISBN: 9788793519138

Buchbeiträge

Badstübner, F.; Ködel, R.; Maurer, W.; Kunert, M.; Rolfsmeier, A.; Perez, J.; Giesemann, F.; Payá Vayá, G.; Blume, H.; Reade, G. (2017): The DESERVE Platform: A Flexible Development Framework to Seemlessly Support the ADAS Development Levels, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems - The DESERVE Approach weitere Informationen

Giesemann, F.; Payá Vayá, G.; Blume, H.; Limmer, M.; Ritter, Werner R. (2017): Deep Learning for Advanced Driver Assistance Systems, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems - The DESERVE Approach weitere Informationen

Mentzer, N.; von Egloffstein, N.; Krüger, L.; Payá Vayá, G.; Blume, H. (2017): Self-Calibration of Wide Baseline Stereo Camera Systems for Automotive Applications, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems - The DESERVE Approach weitere Informationen

Journalbeiträge

Maschhoff, P.; Heene, S.; Lavrentieva, S.; Hentrop, T.; Leibold, C.; Wahalla, M.-N.; Stanislawski, N.; Blume, H.; Scheper, T.; Blume, C. (2017): An intelligent bioreactor system for the cultivation of a bioartificial vascular graft, Engineering in Life Sciences weitere Informationen
DOI: 10.1002/elsc.201600138

Nolting, S.; Payá-Vayá, G.; Giesemann, F.; Blume, H.; Niemann, S.; Müller-Schloer, C. (2017): Dynamic Self-Reconfiguration of a MIPS-Based Soft-Core Processor Architecture, Journal of Parallel and Distributed Computing weitere Informationen
DOI: 10.1016/j.jpdc.2017.09.013

Payá-Vayá, G.; Bartels, C.; Blume, H. (2017): Small footprint synthesizable temperature sensor for FPGA devices, Journal of Systems Architecture, Volume 76, p. 28–38 weitere Informationen
DOI: 10.1016/j.sysarc.2017.03.005

Weide-Zaage, K. (2017): Simulation of Packaging under Harsh Environment Conditions (Temperature, Pressure, Corrosion and Radiation) , Microelectronics Reliability, Volume XX, September 2017, Pages in print

Weide-Zaage, K.; Payá-Vayá, G. (2017): COTS – Harsh Condition Effects Considerations from Technology to User Level, Adv. Sci. Technol. Eng. Syst. J. 2(3), 1592-1598 (2017)
ISBN: ISSN: 2415-6698

Konferenzbeiträge

Arndt, O. J.; Spindeldreier, C.; Wohnrade, K.; Pfefferkorn, D.; Neuenhahn, M.; Blume, H. (2017): FPGA Accelerated NoC-Simulation – A Case Study on the Intel Xeon Phi Ringbus Topology, Intl. Symp. Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2017), ACM

Arndt, O. J.; Träger, F. D.; Moß, T.; Blume, H. (2017): Portable Implementation of Advanced Driver-Assistance Algorithms on Heterogeneous Architectures, Heterogeneity in Computing Workshop (HCW-17), hosted at Intl. Parallel and Distributed Processing Symp. Workshops (IPDPSW 2017), IEEE
DOI: 10.1109/IPDPSW.2017.100

Cholewa, F.; Wielage M.; Pirsch, P.; Blume, H. (2017): Synthetic Aperture Radar with Fast Factorized Backprojection: A Scalable, Platform Independent Architecture for Exhaustive FPGA Resource Utilization, International Conference on Radar Systems 2017 (RADAR) (accepted for publication)

Dürre, J.; Blume, H. (2017): SF3: A Scalabe and Flexible FPGA-Framework for Education and Rapid Prototyping, Proceedings of the International Conference on Microelectronic Systems Education (MSE 2017), Lake Louise, Canada

Dürre, J.; Blume, H. (2017): Teaching VHDL Design to Schoolchildren – A Scalable and Flexible FPGA Framework, Cadence User Conference (CDNLive EMEA 2017), München, Germany

Gerlach, L.; Marquardt, D.; Payá Vayá, G.; Liu, S.; Weißbrich, M.; Doclo, S.; Blume, H.  (2017): Analyzing the Trade-Off between Power Consumption and Beamforming Algorithm Performance using a Hearing Aid ASIP, (accepted) 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), IEEE

Giesemann, F.; Payá-Vayá, G.; Gerlach, L.; Blume, H.; Pflug, F.; von Voigt, G. (2017): Using a Genetic Algorithm Approach to Reduce Register File Pressure during Instruction Scheduling, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation 2017 (SAMOS XVII) [accepted for publication]

Hartig, J.; Payá Vayá, G.; Heymann, H.; Blume, H. (2017): Tool-Supported Design Space Exploration of a Processor System for SIFT-Feature Detection, IEEE International Conference on Consumer Electronics (ICCE), Berlin, 2017

Hartig, J.; Payá Vayá, G.; Mentzer, N.; Blume, H. (2017): Balanced Application-Specific Processor System for Efficient SIFT-Feature Detection, IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), Stamatis Vassiliadis Best Paper Award, 2017

Leibold, C.; Stanislawski, N.; Blume, C.; Blume, H. (2017): A Mobile Electrochemical (Bio-)Sensor Node for a Vascular Graft Bioreactor, Biomedical Circuits and Systems Conference (BioCAS) 2017

Najafi, A.; Weißbrich, M.; Payá Vayá, G.; García-Ortiz, A. (2017): A Fair Comparison of Adders in Stochastic Regime, 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)

Nolting, S.; Giesemann, F.; Hartig, J.; Schmider, A.; Payá-Vayá, G (2017): Application-Specific Soft-Core Vector Processor for Advanced Driver Assistance Systems, 27th International Conference on Field-Programmable Logic and Applications 2017, Ghent, Belgium

Nolting, S.; Liu, L.; Payá-Vayá, G. (2017): Two-LUT-Based Synthesizable Temperature Sensor for Virtex-6 FPGA Devices, 27th International Conference on Field-Programmable Logic and Applications 2017, Ghent, Belgium

Pohl, M.; Erstling, M.; Hein, V.; Weide-Zaage, K.; Chen, T. (2017): Differences in Reliability Effects for Thick Copper and Thick Aluminum Metallizations , IEEE International Reliability Physics Symposium (IRPS), Pages: MR-2.1 - MR-2.7
DOI: 10.1109/IRPS.2017.7936377

S. Divanbeigi, E. Aditya and M. Olbrich (2017): Accelerated Mixed-Signal Simulations Using Multi-Core Architecture, Frontiers in Analog CAD weitere Informationen

Seifert, C.; Thiemann, J.; Gerlach, L.; Volkmar, T.; Payá-Vayá, G.; Blume, H.; van de Par, S.  (2017): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a VLIW-SIMD Processor (accepted), International Conference on Multimedia and Expo (ICME) 2017, IEEE
DOI: 10.1109/ICME.2017.8019478

Sekar Sethu, R.; Hein, V.; Erstling, M.; Weide-Zaage, K. (2017): Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks, International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), Pages: 1 - 6
DOI: 10.1109/EuroSimE.2017.7926226

Stuckenberg, T.; Blume, H. (2017): A Hardware Efficient Preamble Detection Algorithm for Powerline Communication, Journal of Communications, JCM
DOI: 10.12720/jcm

Webering, F.; Payá-Vayá, G.; Aditya, E.; Dürre, J.; Blume, H. (2017): An Integrated Heated Testbench for Characterizing High Temperature ICs [Best Flash Presentation Award], ICT.OPEN2017, Amersfoort, Netherlands

Weide-Zaage, K.; Eichin, P.; Chen, C.; Zhao, Y.; Zhao, L.  (2017): COTS - Radiation Effects Approaches and Considerations, Surface Mount Technology Association (SMTA), Pan Pacific Symposium (Best Paper)

Weide-Zaage, K.; Frémont, H.; Guédon- Gracia, A.; Feng, Y.; Chen, A. (2017): Study of Corrosion in BGA solder balls, EUROCORR 2017, 20th International Corrosion Congress (ICC) and Process Safety Congress 2017

Weide-Zaage, K.; Fremont, H.; Hein, V. (2017): Packages and Interconnects under Harsh Conditions, Surface Mount Technology Association (SMTA), International Conference

Weißbrich, M.; Payá-Vayá, G.; Gerlach, L.; Blume, H.; Najafi, A.; García-Ortiz, A. (2017): FLINT+: A Runtime-Configurable Emulation-Based Stochastic Timing Analysis Framework, 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)

Wielage, M.; Cholewa, F.; Fahnemann, C.; Pirsch, P.; Blume, H. (2017): High Performance and Low Power Architectures: GPU vs. FPGA for Fast Factorized Backprojection, Proceedings of CANDAR Symposium (accepted for publication)

Wielage, M.; Cholewa, F.; Riggers, C.; Pirsch, P.; Blume, H. (2017): Parallelization Strategies for Fast Factorized Backprojection SAR on Embedded Multi-Core Architectures, 2017 IEEE International Conference on Microwave, Communications, Antennas and Electronic Systems (accepted for publication)

Sonstiges

Gerlach, L.; Payá-Vayá, G.; Blume, H. (2017): Low-Power Optimization of a VLIW-SIMD ASIP for Hearing Aid Devices, Tensilica Day—Trends in Modern Design of Configurable Processors 2017, Hannover, Germany

Payá-Vayá, G.; Roskamp, S.; Webering, F.; Blume, H. (2017): Improving the Processing Performance of a DSP for High Temperature Electronics using Circuit-Level Timing Speculation, Tensilica Day—Trends in Modern Design of Configurable Processors

Weide-Zaage, K. (2017): Considerations Concerning Simulation of Radiation Effects in Chip and Packages, International Workshop on Reliability and Radiation Effects of Micro- and Nano-Electronic Devices 2017 (IWRRE-MNED2017) Invited Speaker