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Logo: Institut für Mikroelektronische Systeme
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Logo: Institut für Mikroelektronische Systeme
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Bücher

Payá-Vayá, G. (Ed.); Blume H. (Ed.) (2017): Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems weitere Informationen
DOI: 10.13052/rp-9788793519138
ISBN: 9788793519138

Buchbeiträge

Badstübner, F.; Ködel, R.; Maurer, W.; Kunert, M.; Rolfsmeier, A.; Perez, J.; Giesemann, F.; Payá Vayá, G.; Blume, H.; Reade, G. (2017): The DESERVE Platform: A Flexible Development Framework to Seemlessly Support the ADAS Development Levels, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems - The DESERVE Approach weitere Informationen

Giesemann, F.; Payá Vayá, G.; Blume, H.; Limmer, M.; Ritter, Werner R. (2017): Deep Learning for Advanced Driver Assistance Systems, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems - The DESERVE Approach weitere Informationen

Mentzer, N.; von Egloffstein, N.; Krüger, L.; Payá Vayá, G.; Blume, H. (2017): Self-Calibration of Wide Baseline Stereo Camera Systems for Automotive Applications, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems - The DESERVE Approach weitere Informationen

Journalbeiträge

Maschhoff, P.; Heene, S.; Lavrentieva, S.; Hentrop, T.; Leibold, C.; Wahalla, M.-N.; Stanislawski, N.; Blume, H.; Scheper, T.; Blume, C. (2017): An intelligent bioreactor system for the cultivation of a bioartificial vascular graft, Engineering in Life Sciences weitere Informationen
DOI: 10.1002/elsc.201600138

Payá-Vayá, G.; Bartels, C.; Blume, H. (2017): Small footprint synthesizable temperature sensor for FPGA devices, Journal of Systems Architecture, Volume 76, p. 28–38 weitere Informationen
DOI: 10.1016/j.sysarc.2017.03.005

Konferenzbeiträge

Arndt, O. J.; Spindeldreier, C.; Wohnrade, K.; Pfefferkorn, D.; Neuenhahn, M.; Blume, H. (2017): FPGA Accelerated NoC-Simulation – A Case Study on the Intel Xeon Phi Ringbus Topology (accepted for publication), Intl. Symp. Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2017), ACM

Arndt, O. J.; Träger, F. D.; Moß, T.; Blume, H. (2017): Portable Implementation of Advanced Driver-Assistance Algorithms on Heterogeneous Architectures (accepted for publication), Intl. Parallel and Distributed Processing Symp. Workshops (IPDPSW 2017), IEEE

Dürre, J.; Blume, H. (2017): SF3: A Scalabe and Flexible FPGA-Framework for Education and Rapid Prototyping, Proceedings of the International Conference on Microelectronic Systems Education (MSE 2017), Lake Louise, Canada

Dürre, J.; Blume, H. (2017): Teaching VHDL Design to Schoolchildren – A Scalable and Flexible FPGA Framework, Cadence User Conference (CDNLive EMEA 2017), München, Germany

Gerlach, L.; Marquardt, D.; Payá Vayá, G.; Liu, S.; Weißbrich, M.; Doclo, S.; Blume, H.  (2017): Analyzing the Trade-Off between Power Consumption and Beamforming Algorithm Performance using a Hearing Aid ASIP, (accepted) 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), IEEE

Giesemann, F.; Payá-Vayá, G.; Gerlach, L.; Blume, H.; Pflug, F.; von Voigt, G. (2017): Using a Genetic Algorithm Approach to Reduce Register File Pressure during Instruction Scheduling, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation 2017 (SAMOS XVII) [accepted for publication]

Hartig, J.; Payá Vayá, G.; Mentzer, N.; Blume, H. (2017): Balanced Application-Specific Processor System for Efficient SIFT-Feature Detection, (accepted) 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), IEEE

Pohl, M.; Erstling, M.; Hein, V.; Weide-Zaage, K.; Chen, T. (2017): Differences in Reliability Effects for Thick Copper and Thick Aluminum Metallizations , IEEE International Reliability Physics Symposium (IRPS), in print

Seifert, C.; Thiemann, J.; Gerlach, L.; Volkmar, T.; Payá-Vayá, G.; Blume, H.; van de Par, S.  (2017): Real-Time Implementation of a GMM-Based Binaural Localization Algorithm on a VLIW-SIMD Processor (accepted), International Conference on Multimedia and Expo (ICME) 2017, IEEE

Webering, F.; Payá-Vayá, G.; Aditya, E.; Dürre, J.; Blume, H. (2017): An Integrated Heated Testbench for Characterizing High Temperature ICs [Best Flash Presentation Award], ICT.OPEN2017, Amersfoort, Netherlands

Weide-Zaage, K.; Eichin, P.; Chen, C.; Zhao, Y.; Zhao, L.  (2017): COTS - Radiation Effects Approaches and Considerations, Surface Mount Technology Association (SMTA), Pan Pacific Symposium (Best Paper)

Sonstiges

Gerlach, L.; Payá-Vayá, G.; Blume, H. (2017): Low-Power Optimization of a VLIW-SIMD ASIP for Hearing Aid Devices, Tensilica Day—Trends in Modern Design of Configurable Processors 2017, Hannover, Germany

Payá-Vayá, G.; Roskamp, S.; Webering, F.; Blume, H. (2017): Improving the Processing Performance of a DSP for High Temperature Electronics using Circuit-Level Timing Speculation, Tensilica Day—Trends in Modern Design of Configurable Processors